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UPSD3312D Datasheet(PDF) 240 Page - STMicroelectronics |
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UPSD3312D Datasheet(HTML) 240 Page - STMicroelectronics |
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240 / 272 page  Obsolete Product(s) - Obsolete Product(s) Obsolete Product(s) - Obsolete Product(s) PSD module UPSD33xx 240/272 Doc ID 9685 Rev 7 Figure 83. Example of chaining UPSD33xx devices 27.5.8 Debugging the 8032 MCU module The 8032 on the MCU module may be debugged in-circuit using the same four basic JTAG signals as used for JTAG ISP (TDI, TDO, TCK, TMS). The signals TSTAT and TERR are not needed for debugging, and they will not create a problem if they exist on the circuit board while debugging. The same connector specified in Figure 82 can be used for ISP or for 8032 debugging. There are 3rd party suppliers of UPSD33xx JTAG debugging equipment (check www.st.com/mcu). These are small pods which connect to a PC (or notebook computer) using a USB interface, and they are driven by an 8032 Integrated Development Environment (IDE) running on the PC. Standard debugging features are provided through this JTAG interface such as single-step, breakpoints, trace, memory dump and fill, and others. There is also a dedicated Debug pin (shown in Figure 79 on page 235) which can be configured as an output to trigger external devices upon a programmable internal event (e.g., breakpoint match), or the pin can be configured as an input so an external device can initiate an internal debug event (e.g., break execution). The Debug pin function is configured by the 8032 IDE debug software tool. See Section 12: Debug unit on page 59 for more details. Device 1 UPSD33XX UPSD33XX TMS TCK TDI TDO IEEE 1149.1 Compliant Device Device 2 Device N System Reset Circuitry TMS TCK TDI TDO TSTAT TERR CIRCUIT BOARD JTAG CONN. VCC TMS TCK TDI TSTAT TERR TDO RST GND 100K 100K 100K 100K 100K 10K 100K JTAG Programming or Test Equipment Connects Here Optional Optional TMS TCK TDI TDO TSTAT TERR AI09188b |
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