UPSD3312D datasheet(250/272 Pages) STMICROELECTRONICS

250 / 272 page

Obsolete

Product(s)

- Obsolete

Product(s)

Obsolete

Product(s)

- Obsolete

Product(s)

DC and AC parameters

UPSD33xx

250/272

Doc ID 9685 Rev 7

Table 167.

PSD module DC characteristics (with 5 V VDD)

Symbol

Parameter

Test condition

(in addition to Table 166

on page 249)

Min.

Typ.

Max.

Unit

VIH

Input high voltage

4.5 V < VDD < 5.5 V

VDD

+0.5

VIL

Input low voltage

4.5 V < VDD < 5.5 V

–0.5

0.8

VLKO

VDD (min) for Flash Erase and

Program

2.5

4.2

VOL

Output low voltage

IOL = 20 µA, VDD = 4.5 V

0.01

0.1

IOL = 8 mA, VDD = 4.5 V

0.25

0.45

VOH

Output high voltage

IOH = –20 µA, VDD = 4.5 V

4.4

4.49

IOH = –2 mA, VDD = 4.5 V

2.4

3.9

ISB

Standby supply current

for Power-down mode

CSI > VDD – 0.3 V

(1)(2)

Internal Power-down mode is active.

PLD is in non-Turbo mode, and none of the inputs are switching.

120

250

µA

ILI

Input leakage current

VSS < VIN < VDD

–1

±0.1

µA

ILO

Output leakage current

0.45 < VOUT < VDD

–10

±5

µA

ICC

(DC)(3)

IOUT = 0 mA

Operating

supply current

PLD only

PLD_TURBO = Off,

f = 0 MHz(4)

µA/PT

PLD_TURBO = On,

f = 0 MHz

400

700

µA/PT

Flash memory

During Flash memory

WRITE/Erase only

Read only, f = 0 MHz

SRAM

f = 0 MHz

ICC

(AC)(3)

PLD AC Adder

(4)

Please see Figure 84 on page 242 for the PLD current calculation.

Flash memory AC Adder

1.5

2.5

mA/MHz

SRAM AC Adder

1.5

3.0

mA/MHz

UPSD3312D Datasheet(PDF) 250 Page - STMicroelectronics

UPSD3312D Datasheet(HTML) 250 Page - STMicroelectronics

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

Datasheet Download

Link URL