CP3SP33SMSSLASHNOPB datasheet(299/407 Pages) TI1

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CP3SP33

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SNOSCW5 – MAY 2013

does), the ACBnST.BER bit is set.

3. If there is no bus conflict, the ACBnST.MASTER and ACBnST.SDAST bits are set.

4. If the ACBnCTL1.INTEN bit is set, and either the ACBnST.BER bit or the ACBnST.SDAST bit is set, an

interrupt is asserted.

29.2.1.1 Sending the Address Byte

Once this device is the active master of the ACCESS.bus (ACBnST.MASTER = 1), it can send the

address on the bus. The address must not be this device’s own address as specified in the

ACBnADDR.ADDR field if the ACBnAD- DR.SAEN bit is set or the ACBnADDR2.ADDR field if the

ACBnADDR2.SAEN bit is set. The address also must not be the global call address if the

ACBnST.GCMTCH bit is set or the ARP address if the ACBnST.ARPMATCH bit is set.

To send the address byte, use the following sequence:

1. Load the ACBnCTL1.INTEN and ACBnCTL1.DMAEN bits for the desired operation mode. For a

receive transaction where software wants only one byte of data, it should set the ACBnCTL1.ACK bit.

If only an address needs to be sent, set the ACBnCTL1.STASTRE bit.

2. Write the address byte (7-bit target device address), and the direction bit, to the ACBnSDA register.

This causes the module to generate a transaction. At the end of this transaction, the acknowledge bit

received is copied to the ACBnST.NEGACK bit. During the transaction, the SDAn and SCLn signals

are continuously checked for conflicts with other devices. If a conflict is detected, the transaction is

aborted, the ACBnST.BER bit is set, and the ACBnST.MASTER bit is cleared.

Dual ACCESS.bus Interfaces

299

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CP3SP33SMS/NOPB Datasheet(PDF) 299 Page - Texas Instruments