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CP3SP33SMS/NOPB Datasheet(PDF) 337 Page - Texas Instruments

Part # CP3SP33SMS/NOPB
Description  Connectivity Processor with Cache, DSP, and Bluetooth짰, USB, and Dual CAN Interfaces
PDF  407 Pages
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Manufacturer  TI1 [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI1 - Texas Instruments

CP3SP33SMS/NOPB Datasheet(HTML) 337 Page - Texas Instruments

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COUNT1_n[15:8]
Res
0
15
[15:8]
P2POL
TIOn_2
PERCAP1_n[15:8]
Compare
DTYCAP1_n[15:8]
Compare
R
Q
S
C1PRSC
= =
7
0
Prescaler
Counter
COUNT1_n[7:0]
Res
0
7
[7:0]
P1POL
TIOn_1
PERCAP1_n[7:0]
Compare
DTYCAP1_n[7:0]
Compare
R
Q
S
T1RUN
TMOD1 = 01
T2RUN
DS355
CP3SP33
www.ti.com
SNOSCW5 – MAY 2013
The two I/O pins associated with a timer subsystem function are independent PWM outputs in the dual 8-
bit PWM mode. If a PWM timer is stopped using its associated MODE_n.TxRUN bit the following actions
result:
•
The associated TIOn_y pin will return to its default value as defined by the IOxCTL_n.PxPOL bit.
•
The counter will stop and will retain its last value.
•
Any pending updates of the PERCAPx_n and DTYCAPx_n register will be completed.
•
The prescaler counter will be stopped and reset if both MODE_n.TxRUN bits are cleared.
Figure 33-3 illustrates the configuration of a timer subsystem while operating in dual 8-bit PWM mode. The
numbering in Figure 33-3 refers to timer subsystem 1 but equally applies to the other three timer
subsystems.
Figure 33-3. VTU Dual 8-Bit PWM Mode
33.1.2 16-Bit PWM Mode
Each of the four timer subsystems may be independently configured to provide a single 16-bit PWM
channel. In this case the lower and upper bytes of the counter are concatenated to form a single 16-bit
counter.
Operation in 16-bit PWM mode is conceptually identical to the dual 8-bit PWM operation as outlined under
Dual 8-bit PWM Mode on page 254. The 16-bit timer may be started or stopped with the lower
MODE_n.TxRUN bit, i.e., T1RUN for timer subsystem 1.
The two TIOn_y outputs associated with a timer subsystem can be used to produce either two identical
PWM waveforms or two PWM waveforms of opposite polarities. This can be accomplished by setting the
two PxPOL bits of the respective timer subsystem to either identical or opposite values.
Figure 33-4 illustrates the configuration of a timer subsystem while operating in 16-bit PWM mode. The
numbering in Figure 33-4 refers to timer subsystem 1 but equally applies to the other three timer
subsystems.
Copyright © 2013, Texas Instruments Incorporated
Dual Versatile Timer Units (VTU)
337
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