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CP3SP33SMS/NOPB Datasheet(PDF) 334 Page - Texas Instruments

Part # CP3SP33SMS/NOPB
Description  Connectivity Processor with Cache, DSP, and Bluetooth짰, USB, and Dual CAN Interfaces
PDF  407 Pages
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Manufacturer  TI1 [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI1 - Texas Instruments

CP3SP33SMS/NOPB Datasheet(HTML) 334 Page - Texas Instruments

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CP3SP33
SNOSCW5 – MAY 2013
www.ti.com
33 Dual Versatile Timer Units (VTU)
Each Versatile Timer Unit (VTU) contains four fully independent 16-bit timer subsystems. Each timer
subsystem can operate either as dual 8-bit PWM timers, as a single 16-bit PWM timer, or as a 16-bit
counter with 2 input capture channels. These timer subsystems offers an 8-bit clock prescaler to
accommodate a wide range of system frequencies.
Each of the two VTUs provided on the CP3SP33 offers the following features:
•
The VTU can be configured to provide:
–
Eight fully independent 8-bit PWM channels
–
Four fully independent 16-bit PWM channels
–
Eight 16-bit input capture channels
•
The VTU consists of four timer subsystems, each of which contains:
–
A 16-bit counter
–
Two 16-bit capture / compare registers
–
An 8-bit fully programmable clock prescaler
•
Each of the four timer subsystems can operate in the following modes:
–
Low power mode, i.e., all clocks are stopped
–
Dual 8-bit PWM mode
–
16-bit PWM mode
–
Dual 16-bit input capture mode
•
The VTU controls a total of eight I/O pins, each of which can function as either:
–
PWM output with programmable output polarity
–
Capture input with programmable event detection and timer reset
•
A flexible interrupt scheme with
–
Four separate system level interrupt requests
–
A total of 16 interrupt sources each with a separate interrupt pending bit and interrupt enable bit
33.1 VTU Functional Description
Each VTU is comprised of four timer subsystems. Each timer subsystem contains an 8-bit clock prescaler,
a 16-bit up-counter, and two 16-bit registers. Each timer subsystem controls two I/O pins which either
function as PWM outputs or capture inputs depending on the mode of operation. There are four system-
level interrupt requests, one for each timer subsystem. Each system-level interrupt request is controlled by
four interrupt pending bits with associated enable/disable bits. All four timer subsystems are fully
independent, and each may operate as a dual 8-bit PWM timer, a 16-bit PWM timer, or as a dual 16-bit
capture timer. Figure 33-1 shows the main elements of the VTU.
334
Dual Versatile Timer Units (VTU)
Copyright © 2013, Texas Instruments Incorporated
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