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CP3SP33SMS/NOPB Datasheet(PDF) 335 Page - Texas Instruments |
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CP3SP33SMS/NOPB Datasheet(HTML) 335 Page - Texas Instruments |
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335 / 407 page  INTCTL_n 0 15 MODE_n 0 15 COUNT1_n TIOn_1 0 15 PERCAP1_n Compare Capture - DTYCAP1_n Compare Capture - C1 PRSC Timer Subsystem 1 = = 7 Prescaler Counter I/O Control INTPND_n 0 15 IO1CTL_n 0 15 IO2CTL_n 0 15 TIOn_2 I/O Control COUNT2_n TIOn_3 0 15 PERCAP2_n Compare Capture - DTYCAP2_n Compare Capture - C2 PRSC = = 7 Prescaler Counter I/O Control TIOn_4 I/O Control COUNT4_n TIOn_7 0 15 PERCAP4_n Compare Capture - DTYCAP4_n Compare Capture - C4RSC = = 7 Prescaler Counter I/O Control TIOn_8 I/O Control COUNT3_n TIOn_5 0 15 PERCAP3_n Compare Capture - DTYCAP3_n Compare Capture - C3 PRSC = = 7 Prescaler Counter I/O Control TIOn_6 I/O Control Timer Subsystem 2 Timer Subsystem 3 Timer Subsystem 4 DS353 CP3SP33 www.ti.com SNOSCW5 – MAY 2013 Figure 33-1. Versatile Timer Unit Block Diagram 33.1.1 Dual 8-bit PWM Mode Each timer subsystem may be configured to generate two fully independent PWM waveforms on the respective TIOx pins. In this mode, the counter COUNTx_n is split and operates as two independent 8-bit counters. (In this section, n is the VTU module number which is either 0 or 1, and x is the VTU subsystem number which may be 1 to 4.) Each counter increments at the rate determined by the clock prescaler. Each of the two 8-bit counters may be started and stopped separately using the corresponding TxRUN bits. Once either of the two 8-bit timers is running, the clock prescaler starts counting. Once the clock prescaler counter value matches the value of the associated CxPRSC register field, COUNTx_n is incremented. The period of the PWM output waveform is determined by the value of the PERCAPx_n register. The TIOn_y output starts at the default value as programmed in the IOxCTL_n.PxPOL bit. (In this section, y is the TIOn I/O number, which may be 1 to 8.) Once the counter value reaches the value of the period register PERCAPx_n, the counter is cleared on the next counter increment. On the following increment from 00h to 01h, the TIOn_y output will change to the opposite of the default value. The duty cycle of the PWM output waveform is controlled by the DTYCAPx_n register value. Once the counter value reaches the value of the duty cycle register DTYCAPx_n, the PWM output TIOn_y changes back to its default value on the next counter increment. Figure 33-2 illustrates this concept. Copyright © 2013, Texas Instruments Incorporated Dual Versatile Timer Units (VTU) 335 Submit Documentation Feedback Product Folder Links :CP3SP33 |
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