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SPC564A80L7 Datasheet(PDF) 155 Page - STMicroelectronics |
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SPC564A80L7 Datasheet(HTML) 155 Page - STMicroelectronics |
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155 / 157 page ![]() SPC564A74L7, SPC564A80B4, SPC564A80L7 Document revision history Doc ID 15399 Rev 9 155/157 03-Feb-2012 (cont) 6 (cont) – Added Table 17: SPC564A80 External network specification. – Updated Figure 8: Core voltage regulator controller external components preferred configuration. – Changed External Network Parameter Ce min value to “3*2.35 F+5 F” from “2*2.35 F+5 F” in Table 17: SPC564A80 External network specification. – Changed Trans. Line (differential Zo) unit to from W in Table 25: DSPI LVDS pad specification. 07-Mar-2012 7 – Update table footnotes in Table 21: DC electrical specifications. 21-Mar-2012 8 – Minor editorial changes. –In Section 1.4, “SPC564A80 feature list, moved “24 unified channels” after “1 x eMIOS”. –In Table 4,“SPC564A80 signal properties”/Column “Name” updated the following rows: DSPI_D_SCK /GPIO [98] -Changed “-” to CS[2] DSPI_D_SIN /GPIO[99] -Changed “-” to CS[3]. –In Table 12,“Thermal characteristics for 324-pin PBGA”/ Column “Value” added conditional text. –In Table 21,“DC electrical specifications” made the following changes: -For the value “VOL_S” parameter changed from “Slow/ medium/multi-voltage pad I/O output low voltage” to “Slow/medium pad I/O output low voltage”. -Added a new row for “IDDSTBY27”. -For row “IDDSTBY(operating current 0.95 -1.2V)” added max value “100” and changed typ value from “125” to “35”. -For row “IDDSTBY (operating current 2 - 5.5V)” added max value “110” and changed typ value from “135” to “45”. -For symbol “IDDSTBY 150(operating current 0.95 -1.2V)” added max value “2000”, changed typ value from “1050” to “790”,C cell changed from “T” to “P” and for symbol “IDDSTBY (operating current 2 - 5.5V)” added max value “2000”, changed typ value from “1050” to “760”, C cell changed from “T” to “P”. -Removed note 9 and note 10 (Characterization based capability) from symbol “VOL_HS”. – Splitted Table 28,“eQADC conversion specifications (operating)”into Table 29,“eQADC single ended conversion specifications (operating)” and Table 30,“eQADC differential ended conversion specifications (operating)”. –In Table 30 ,“eQADC differential ended conversion specifications (operating)”made the following changes: -Added the note of DIFFcmv on all of the DIFF specs. -Min value changed from (VRH-VRL)/2-5% to (VRH+VRL)/2-5 % and max value changed from (VRH-VRL)/2+5 % to (VRH+VRL)/2+5 %for DIFFcmv. –In Table 31 ,“Cutoff frequency for additional SRAM wait state”made the following changes: -Added note “Max frequencies including 2% PLL FM”. -Max operating frequency changed from “96” to “98” and “150” to “153”. –In Section 3.13, “Configuring SRAM wait states, changed text from “SPC564A80 4M Microcontroller Reference Manual “ to “device reference manual”. Table 56. Revision history (continued) Date Revision Changes |
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