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MPF7100BVBA3ES Datasheet(PDF) 21 Page - NXP Semiconductors

Part # MPF7100BVBA3ES
Description  7-channel power management integrated circuit for high performance applications
PDF  125 Pages
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Manufacturer  NXP [NXP Semiconductors]
Direct Link  http://www.nxp.com
Logo NXP - NXP Semiconductors

MPF7100BVBA3ES Datasheet(HTML) 21 Page - NXP Semiconductors

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NXP Semiconductors
PF7100
7-channel power management integrated circuit for high performance applications
PF7100
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2021. All rights reserved.
Product data sheet
Rev. 4 — 9 March 2021
21 / 125
FS_CNT[3:0] is 0x00. The FS_CNT[3:0] may be manually cleared during the system-on
state if the system wants to control this counter manually.
14 General device operation
14.1 UVDET
UVDET works as the main operation threshold for the PF7100. Crossing UVDET on the
rising edge is a mandatory condition for OTP fuses to be loaded into the mirror registers
and allows the main PF7100 operation.
If VIN is below the UVDET threshold, the device remains in an unpowered state. A
200 mV hysteresis is implemented on the UVDET comparator to set the falling threshold.
Table 13. UVDET threshold
Symbol
Parameter
Min
Typ
Max
Unit
UVDET
Rising UVDET
2.7
2.8
2.9
V
UVDET
Falling UVDET
2.5
2.6
2.7
V
14.2 VIN OVLO condition
The VIN_OVLO circuit monitors the main input supply of the PF7100. When this block is
enabled, the PF7100 monitors its input voltage and can be programmed to react to an
overvoltage in two ways:
• When the VIN_OVLO_SDWN = 0, the VIN_OVLO event triggers an OVLO interrupt but
does not turn off the device
• When the VIN_OVLO_SDWN = 1, the VIN_OVLO event initiates a power down
sequence
When the VIN_OVLO_EN = 0, the OVLO monitor is disabled and when the
VIN_OVLO_EN = 1, the OVLO monitor is enabled. The default configuration of the
VIN_OVLO_EN bit is set by the OTP_VIN_OVLO_EN bit in OTP. Likewise, the default
value of the VIN_OVLO_SDWN bit is set by the OTP_VIN_OVLO_SDWN upon power
up.
During a power up transition, if the OTP_VIN_OVLO_SDWN = 0, the device allows the
external regulators to come up and the PF7100 announces the VIN_OVLO condition
through an interrupt after RESETBMCU is de-asserted. If the OTP_VIN_OVLO_SDWN =
1, the device stops the power up sequence and returns to the corresponding OFF mode.
Debounce on the VIN_OVLO comparator is programmable to 10 µs, 100 µs or 1.0 ms, by
the VIN_OVLO_DBNC[1:0] bits. The default value for the VIN_OVLO debounce is set by
the OTP_VIN_OVLO_DBNC[1:0] bits upon power up.
Table 14. VIN_OVLO debounce configuration
VIN_OVLO_DBNC[1:0]
VIN OVLO debounce value (µs)
00
10
01
100
10
1000
11
Reserved



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