MPF7100BVBA3ES datasheet(49/125 Pages) NXP

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NXP Semiconductors

PF7100

7-channel power management integrated circuit for high performance applications

PF7100

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Product data sheet

Rev. 4 — 9 March 2021

49 / 125

• RESETBMCU is de-asserted (system on)

• All ABIST flags are all 0 (ABIST OK)

• No regulator faults are present

• The FSOB_WDI_NOK and/or FSOB_SFAULT_NOK faults are cleared if programmed

to be set by the FSOB_WDI and FSOB_SOFTFAULT bits respectively.

A soft WD reset may also assert the FSOB pin only if programmed by the FSOB_WDI bit.

Likewise, the FSOB_SOFTFAULT bit can select whether the FSOB pin is asserted as

soon as an OV, UV or ILIM fault is present even when this condition has not yet lead to a

fault shutdown. In this scenario, the system is placed in a safe state while the MCU tries

to clear the fault and command the PF7100 to come out of the safe state when all faults

have been cleared.

14.9.11.2 FSOB fault safe state

If the OTP_FSOB_ASS_EN = 0, the active safe state mode is disabled and the FSOB

operate in the fault safe state mode. In this mode, the FSOB pin may still be asserted if

programmed by other fault events.

In the fault safe state mode, the FSOB is de-asserted by default, and can be asserted as

programmed by the FSOB fault selection bits.

A bit is provided to enable the FSOB to be asserted when a regulator fault (OV, UV, ILIM)

is present.

• If FSOB_SOFTFAULT = 0, the FSOB pin is not asserted by any OV, UV, or ILIM fault.

• If FSOB_SOFTFAULT = 1, an OV, UV, or ILIM fault on any of the regulators causes

the FSOB pin to assert and remain asserted regardless of it being corrected or not, and

also asserts the FSOB_SFAULT_NOK flag.

A bit is provided to enable the FSOB to be asserted when a WD reset occurs due to a

WDI event.

• If FSOB_WDI = 0, the FSOB pin is not asserted by a WDI event.

• If FSOB_WDI = 1, a WDI event causes the FSOB pin to assert and the

FSOB_WDI_NOK flag to be set.

A bit is provided to enable the FSOB to be asserted when a WD reset occurs due to an

internal WD counter fault is present.

• If FSOB_WDC = 0, the FSOB pin is not asserted by a WD reset started by the internal

WD counter.

• If FSOB_WDC = 1, a WD reset is started by the internal WD counter causing the FSOB

pin to be asserted and the FSOB_WDC_NOK flag to be set.

A bit is provided to enable the FSOB to be asserted when a hard fault shutdown has

occurred.

• If FSOB_HARDFAULT = 0, the FSOB pin is not asserted by a hard fault.

• If FSOB_HARDFAULT = 1, any of the hard fault shutdown events cause the FSOB pin

to be asserted and the FSOB_HFAULT_NOK flag to be set.

Any of the following events are considered a hard fault shutdown:

• Fault timer expired

• FAULT_CNT = FAULT_MAX_CNT (regulator fault counter max out)

• WD_EVENT_CNT = WD_MAX_CNT (watchdog event counter max out)

• Power up failure

MPF7100BVBA3ES Datasheet(PDF) 49 Page - NXP Semiconductors

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