SL3S1205FUD2SLASHHAP datasheet(22/38 Pages) NXP

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NXP Semiconductors

SL3S1205_15

UCODE 8/8m

9.6.2 Memory Safeguard

9.6.2.1 Description

The Memory Safeguard of UCODE 8/8m consist of three different countermeasures

which ensure integrity of the stored data:

ECC (Error correction code):

The implemented ECC is applied on the EPC- and User-Memory. With this feature, a

single bit failure in the memory is detected and corrected automatically. In case of 2 bit

fail, an indication is given.

EPC Memory:

The config word bit 200h (EPC check) indicates, if the EPC check is active ("1"). In case

a single bit was corrected this will be indicated by the bit 201h (EPC Corr). Should a 2-bit

failure occur bit 202h (EPC NOK) will be activated ("1"). In this case, no error correction

will be applied and the EPC memory content readout will provide the actual content.

User Memory:

The config word bit 20Ch (User Memory check) indicates if the User Memory check

is active ("1"). In case a single bit was corrected this will be indicated by the bit 20Dh

(User Memory Corr). Should a 2-bit failure occur, bit 20Eh (User Memory NOK) will be

activated ("1"). In this case, no error correction will be applied and the User Memory

content readout will provide the actual content.

This feature will be activated in case a Lock operation is applied on the according

memory bank. If there is a password lock and a change of the memory content in the

secured state, the ECC will be not re-calculated and the feature is disabled. To re-enable

the ECC functionality also in this condition, an unlock and re-lock is required.

Parity check:

A parity check on the TID is implemented to offer the possibility to identify a change in

the TID. The parity bit (Even parity) will be calculated and locked in the manufacturing

process. For a check, the TID content needs to be read out and parity checked.

Margin Check

The implemented margin check is acting on the EPC-, Reserved- and User-Memory.

During performing a Lock operation on the targeted memory bank the IC checks for

sufficient programming margin of the memory cell and only responds after a successful

check. In case of insufficient margin an error code will be responded and the Lock not

completed. A re-check on already locked memory banks requires an unlock and re-lock

command.

SL3S1205_15

All information provided in this document is subject to legal disclaimers.

Product data sheet

Rev. 3.5 — 1 April 2021

COMPANY PUBLIC

398435

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