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MC68HC908GR4MP Datasheet(PDF) 156 Page - Freescale Semiconductor, Inc |
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MC68HC908GR4MP Datasheet(HTML) 156 Page - Freescale Semiconductor, Inc |
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156 / 286 page ![]() Input/Output Ports (I/O) MC68HC908GR8 • MC68HC908GR4 Data Sheet, Rev. 7 156 Freescale Semiconductor RxD — SCI Receive Data Input The PTE1/RxD pin is the receive data input for the SCI module. When the enable SCI bit, ENSCI, is clear, the SCI module is disabled, and the PTE1/RxD pin is available for general-purpose I/O. See Chapter 18 Serial Communications Interface (SCI). TxD — SCI Transmit Data Output The PTE0/TxD pin is the transmit data output for the SCI module. When the enable SCI bit, ENSCI, is clear, the SCI module is disabled, and the PTE0/TxD pin is available for general-purpose I/O. See Chapter 18 Serial Communications Interface (SCI). 16.6.2 Data Direction Register E Data direction register E (DDRE) determines whether each port E pin is an input or an output. Writing a 1 to a DDRE bit enables the output buffer for the corresponding port E pin; a 0 disables the output buffer. DDRE1 and DDRE0 — Data Direction Register E Bits These read/write bits control port E data direction. Reset clears DDRE1 and DDRE0, configuring all port E pins as inputs. 1 = Corresponding port E pin configured as output 0 = Corresponding port E pin configured as input NOTE Avoid glitches on port E pins by writing to the port E data register before changing data direction register E bits from 0 to 1. Figure 16-19 shows the port E I/O logic. Figure 16-19. Port E I/O Circuit Address: $000C Bit 7 654321 Bit 0 Read: 000000 DDRE1 DDRE0 Write: Reset: 00000000 = Unimplemented Figure 16-18. Data Direction Register E (DDRE) READ DDRE ($000C) WRITE DDRE ($000C) RESET WRITE PTE ($0008) READ PTE ($0008) PTEx DDREx PTEx |
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