MC68HC908GR4MP datasheet(154/286 Pages) FREESCALE

154 / 286 page

Input/Output Ports (I/O)

MC68HC908GR8 • MC68HC908GR4 Data Sheet, Rev. 7

154

Freescale Semiconductor

Figure 16-15 shows the port D I/O logic.

Figure 16-15. Port D I/O Circuit

When bit DDRDx is a 1, reading address $0003 reads the PTDx data latch. When bit DDRDx is a 0,

reading address $0003 reads the voltage level on the pin. The data latch can always be written,

regardless of the state of its data direction bit. Table 16-5 summarizes the operation of the port D pins.

Table 16-5. Port D Pin Functions

PTDPUE Bit

DDRD Bit

PTD Bit

I/O Pin Mode

Accesses to DDRD

Accesses to PTD

Read/Write

Read

Write

X(1)

Input, VDD

(4)

DDRD6–DDRD0

PTD6–PTD0(3)

Input, Hi-Z(2)

DDRD6–DDRD0

PTD6–PTD0(3)

Output

DDRD6–DDRD0

PTD6–PTD0

1. X = Don’t care

2. Hi-Z = High impedance

3. Writing affects data register, but does not affect input.

4. I/O pin pulled up to VDD by internal pullup device.

READ DDRD ($0007)

WRITE DDRD ($0007)

RESET

WRITE PTD ($0003)

READ PTD ($0003)

PTDx

DDRDx

PTDx

VDD

PTDPUEx

INTERNAL

PULLUP

DEVICE

MC68HC908GR4MP Datasheet(PDF) 154 Page - Freescale Semiconductor, Inc

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