MC68HC908GR4MP datasheet(151/286 Pages) FREESCALE

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Port C

MC68HC908GR8 • MC68HC908GR4 Data Sheet, Rev. 7

Freescale Semiconductor

151

DDRC1–DDRC0 — Data Direction Register C Bits

These read/write bits control port C data direction. Reset clears DDRC1–DDRC0, configuring all port

C pins as inputs.

1 = Corresponding port C pin configured as output

0 = Corresponding port C pin configured as input

NOTE

Avoid glitches on port C pins by writing to the port C data register before

changing data direction register C bits from 0 to 1.

Figure 16-11 shows the port C I/O logic.

NOTE

For those devices packaged in a 28-pin DIP and SOIC package, PTC1,0

are not connected. Set DDRC1,0 to a 1 to configure PTC1,0 as outputs.

Figure 16-11. Port C I/O Circuit

When bit DDRCx is a 1, reading address $0002 reads the PTCx data latch. When bit DDRCx is a 0,

reading address $0002 reads the voltage level on the pin. The data latch can always be written,

regardless of the state of its data direction bit. Table 16-4 summarizes the operation of the port C pins.

Table 16-4. Port C Pin Functions

PTCPUE Bit

DDRC Bit

PTC Bit

I/O Pin Mode

Accesses to DDRC

Accesses to PTC

Read/Write

Read

Write

X(1)

Input, VDD

(4)

DDRC1–DDRC0

PTC1–PTC0(3)

Input, Hi-Z(2)

DDRC1–DDRC0

PTC1–PTC0(3)

Output

DDRC1–DDRC0

PTC1–PTC0

Notes:

1. X = Don’t care

2. Hi-Z = High impedance

3. Writing affects data register, but does not affect input.

4. I/O pin pulled up to VDD by internal pullup device.

READ DDRC ($0006)

WRITE DDRC ($0006)

RESET

WRITE PTC ($0002)

READ PTC ($0002)

PTCx

DDRCx

PTCx

VDD

PTCPUEx

INTERNAL

PULLUP

DEVICE

MC68HC908GR4MP Datasheet(PDF) 151 Page - Freescale Semiconductor, Inc

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