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MC68HC908GR4MP Datasheet(PDF) 148 Page - Freescale Semiconductor, Inc |
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MC68HC908GR4MP Datasheet(HTML) 148 Page - Freescale Semiconductor, Inc |
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148 / 286 page ![]() Input/Output Ports (I/O) MC68HC908GR8 • MC68HC908GR4 Data Sheet, Rev. 7 148 Freescale Semiconductor PTAPUE3–PTAPUE0 — Port A Input Pullup Enable Bits These writeable bits are software programmable to enable pullup devices on an input port bit. 1 = Corresponding port A pin configured to have internal pullup 0 = Corresponding port A pin has internal pullup disconnected 16.3 Port B Port B is a 6-bit special-function port that shares all six of its pins with the analog-to-digital converter (ADC) module. 16.3.1 Port B Data Register The port B data register (PTB) contains a data latch for each of the six port pins. PTB5–PTB0 — Port B Data Bits These read/write bits are software-programmable. Data direction of each port B pin is under the control of the corresponding bit in data direction register B. Reset has no effect on port B data. AD5–AD0 — Analog-to-Digital Input Bits AD5–AD0 are pins used for the input channels to the analog-to-digital converter module. The channel select bits in the ADC status and control register define which port B pin will be used as an ADC input and overrides any control from the port I/O logic by forcing that pin as the input to the analog circuitry. NOTE Care must be taken when reading port B while applying analog voltages to AD5–AD0 pins. If the appropriate ADC channel is not enabled, excessive current drain may occur if analog voltages are applied to the PTBx/ADx pin, while PTB is read as a digital input. Those ports not selected as analog input channels are considered digital I/O ports. PTB4 and 5 are not available in a 28-pin DIP and SOIC package Address: $000D Bit 7 654321 Bit 0 Read: 0000 PTAPUE3 PTAPUE2 PTAPUE1 PTAPUE0 Write: Reset: 00000000 = Unimplemented Figure 16-5. Port A Input Pullup Enable Register (PTAPUE) Address: $0001 Bit 7 6 5 4321 Bit 0 Read: 0 0 PTB5 PTB4 PTB3 PTB2 PTB1 PTB0 Write: Reset: Unaffected by reset Alternative Function: AD5 AD4 AD3 AD2 AD1 AD0 = Unimplemented Figure 16-6. Port B Data Register (PTB) |
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