AX88180 datasheet(10/47 Pages) ASIX

10 / 47 page

AX88180

ASIX ELECTRONICS CORPORATION

HD26

IO3, 8mA

113

Data bus bit26, internal pull down. *

HD27

IO3, 8mA

112

Data bus bit27, internal pull down. *

HD28

IO3, 8mA

111

Data bus bit28, internal pull down. *

HD29

IO3, 8mA

110

Data bus bit29, internal pull down. *

HD30

IO3, 8mA

109

Data bus bit30, internal pull down. *

HD31

IO3, 8mA

108

Data bus bit31, internal pull down. *

HA1

Address bus bit1.

HA2

Address bus bit2.

HA3

Address bus bit3.

HA4

Address bus bit4.

HA5

Address bus bit5.

HA6

Address bus bit6.

HA7

Address bus bit7.

HA8

Address bus bit8.

HA9

Address bus bit9.

HA10

Address bus bit10.

HA11

Address bus bit11.

HA12

Address bus bit12.

HA13

Address bus bit13.

HA14

Address bus bit14.

HA15

Address bus bit15.

WEN

Data Write Enable:

Host drives WEN and it is active low.

CSN

Chip Select Enable.

Host drives CSN and it is active low.

OEN

Data Output Enable:

Host drives OEN and it is active low.

*Note: The internal Pull-down of HD16 to HD31 will be disabled in 32-bit mode.

2.4 EEPROM Interface

Table 3 : EEPROM Interface signals group

Pin Name

Type

Pin No.

Pin Description

EECLK

O3, 12mA

A low speed clock to EEPROM

EECS

O3, 12mA

Chip select to EEPROM device.

EEDI

O3, 12mA

Data to EEPROM, valid in EECS is high and EECLK in rising edge.

EEDO

I3, PD

Data from EEPROM

2.5 Regulator Interface

Table 4 : Regulator signals group

Pin Name

Type

Pin No.

Pin Description

VCC33R

VCC3

3.3V power to internal regulator

GNDR

GND

Ground pin for internal regulator

REG_EN

High to enable internal regulator. Low to disable internal regulator.

V25OUT

2.5V output from internal regulator, max 250mA, when REG_EN pin is high.

AX88180 Datasheet(PDF) 10 Page - ASIX Electronics Corporation

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