AX88180 datasheet(20/47 Pages) ASIX

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AX88180

ASIX ELECTRONICS CORPORATION

4.9 TXDES2--TX Descriptor2 Register

Offset Address = 0xFC28

Default = 0x0000_0000

Field

Name

Type

Default

Description

31:16

All 0’s

Reserved

TXD2_EN

R/W

Transmit TX descriptor 2

If this bit is enabled, MAC will begin to transmit data that are stored in TX

buffer. In former, driver had already written data that is assigned to TX

descriptor2 to TX buffer. This bit will be cleared by hardware when MAC

finished the transmission.

1= enable

0= disable

14:13

Reserved

12:0

TXD2_LEN

R/W

All 0’s

TX packet length (unit: byte)

Driver set this field to indicate AX88180 how many bytes will be

transmitted.

4.10 TXDES3--TX Descriptor3 Register

Offset Address = 0xFC2C

Default = 0x0000_0000

Field

Name

Type

Default

Description

31:16

All 0’s

Reserved

TXD3_EN

R/W

Transmit TX descriptor 3

If this bit is enabled, MAC will begin to transmit data that are stored in TX

buffer. In former, driver had already written data that is assigned to TX

descriptor3 to TX buffer. This bit will be cleared by hardware when MAC

finished the transmission.

1= enable

0= disable

14:13

Reserved

12:0

TXD3_LEN

R/W

All 0’s

TX Packet Length (unit: byte)

Driver set this field to indicate AX88180 how many bytes will be

transmitted.

4.11 RX_CFG--RX Configuration Register

Offset Address = 0xFC30

Default = 0x0000_0101

Field

Name

Type

Default

Description

31:9

All 0’s

Reserved

RXBME

R/W

RX Buffer Monitor Enable

When this bit is enabled, MAC will monitor the status of receive buffer.

1 = enable

0 = disable

7:5

R/W

000

Reserved.

RXCHKSUM

R/W

RX Packet TCP/IP Checksum

When this bit is set, AX88180 will check the checksum of the received

packet that is IP, TCP or UDP packet. If there is checksum error, AX88180

will drop the packet and RXCHKSUMCNT counter will add 1.

1 = enable

0 = disable

3:1

R/W

000

Reserved

RXBUFPRO

R/W

RX Buffer Protection

When this bit is enabled, MAC will protect the RX buffer to avoid overrun.

For normal operation, this bit should be enabled in initial stage.

1= enable

0= disable

AX88180 Datasheet(PDF) 20 Page - ASIX Electronics Corporation

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