AX88180 datasheet(6/47 Pages) ASIX

6 / 47 page

AX88180

ASIX ELECTRONICS CORPORATION

1.0 Introduction

1.1 General Description

The AX88180, SRAM-like 16/32-bit local bus to Gigabit Ethernet bridge, supports a 10/100/1000 Mbps with RGMII

(V2.0 in delay timing) or MII in wire-speed operation. AX88180 supports RGMII (802.3ab, 1000Base-T) interface with

full-duplex operation at gigabit speed and full-duplex or half-duplex operation at 10/100 Mbps speed. AX88180 can also

operate in MII mode with 10/100Mbps speed.

The AX88180 has two built-in synchronous SRAM for buffering packet.

The one is 32K bytes for receiving packets

from Ethernet PHY; the other is 8K-bytes for transmitting packets from host system to Ethernet PHY. The AX88180 also

has 256 bytes built-in configuration registers. For software programming, the total address space used in AX88180 is 64K

in 32-bit mode and at least (8K + 8) bytes in 16-bit mode.

Because AX88180 is a SRAM-like device, AX88180 could be treated as a SRAM device and can be attached to SRAM

controller of system. Therefore, system can execute DMA cycles to gain the highest performance.

AX88180 needs 2 clock sources. One (HCLK) is the same to host system clock or from stand-along OSC, the other is

125Mhz (CLK125) for AX88180 running in RGMII mode. In general application, the 125MHz clock can be from Giga

-PHY for cost effectively.

1.2 AX88180 Block Diagram

Figure 1 : AX88180 block diagram

AX88180 Datasheet(PDF) 6 Page - ASIX Electronics Corporation