AX88180 datasheet(45/47 Pages) ASIX

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AX88180

ASIX ELECTRONICS CORPORATION

Appendix A5. Wake On LAN (WOL) without driver via Magic Packet

A5-1. Wake On LAN (WOL) without driver

AX88180 can support WOL without driver exists. In such situations, system must offer 3.3V voltage,

reference clock and rest signal to AX88180. Whenever AX88180 detects magic packet from cable, it will drive

WAKEUP signal to host system. AX88180 defaults in MII interface (after reset before EEPROM auto-loaded).

Hence if Giga-PHY supports RGMII interface, designer must use EEPROM to set AX88180 to RGMII interface.

Users must take care is that AX88180 only supports delay timing of RGMII (refer to 5.2.8), thus it must add extra

delay (at least 0.7ns) in PCB board if system needs WOL and without running driver. Below diagram is shown the

concept.

Another available method is to set Giga-PHY in MII mode (by configure pin, if Giga-PHY has this feature).

After AX88180 detects magic packet and wakes up system, driver can set AX88180 to RGMII mode and also set

Giga-PHY to RGMII mode by MDIO interface. If designer employs this approach, the delay timing issue is not

needed.

A5-2. Magic packet

The magic packet received by AX88180 is shown as following;

DA + SA + 0x0000 + 0xFFFFFFFFFFFF + (at least repeats 16 times) DA + CRC32

DA = MAC address of AX88180 (6 bytes)

SA = Source address (6 bytes)

MCU

OSC

HCLK

Power

RC circuit or

Reset pulse generator

Data

Addr

CSN/OEN/WEN

Delay line

rxclk

AX88180

Giga-PHY

No power area

Rst_n

AX88180 Datasheet(PDF) 45 Page - ASIX Electronics Corporation