AX88180 datasheet(13/47 Pages) ASIX

13 / 47 page

AX88180

ASIX ELECTRONICS CORPORATION

3.5 Flow Control

In full duplex mode, AX88180 supports the standard flow control mechanism defined in IEEE 802.3x standard. It

enables the stopping of remote node transmissions via a PAUSE frame information interaction. When space of the packet

buffer is less than the threshold values (RXBTHD0, RXBTHD1), AX88180 will send out a PAUSE-ON packet to stop the

remote node transmission. And then AX88180 will send out a PAUSE-OFF packet to inform the remote node to retransmit

packet if it has enough space to receive packets.

3.6 Checksum Offloads and Wake-up

To reduce the computing loading of CPU, AX88180 is built checksum operator for IP, UDP or TCP packet. AX88180

will detect the packet whether it is IP, UDP or TCP packet. If it is an IP packet, AX88180 will calculate the checksum of

header and put the result in checksum filed of IP. Then it continuously checks the packet whether it is UDP or TCP. It will

perform the checksum operation whenever it is a UDP or TCP packet. AX88180 also automatically skip the VLAN tag

when checksum is executed. AX88180 also supports to detect magic packet or link-up to wake up system when system is in

sleep state or needs to cold start by magic packet.

3.7 Burst-Mode support

To improve the throughput in embedded system, AX88180 supports fast-mode (burst) for TX/RX buffer access. Host

can access AX88180 by driving CSN to low and toggle WEN (write) or OEN (read).

AX88180 can support the burst until

whole packet access. The access timing can refer to section 5.2.4 and 5.2.6. This mechanism is only for TX/RX buffer

access. For configuration register access, it must use single access.

3.8 Big/Little-endian support

AX88180 supports “Big” or “Little” endian data format. The default is Little-endian.

Designer can pull-up GOIO1

pin to high to swap the data format. Below table can depict the relation. This swap is only valid in 32-bit mode.

Figure 4: data swap block

3.9 16-bit Mode

AX88180 also supports 16-bit mode operation. AX88180 driver should request at least (8K + 8) bytes space for TX,

RX and register access. For example, the driver requests a 16K bytes space from system and then sets the new window base

address to MEMBAS6 register. After that, driver should set bit 0 (DECODE_EN) of MEMBASE register to start decoding

for TX buffer, RX buffer and registers access. (Note: AX88180 H/W only decodes low 16-bit offset address.)

MEMBASE--Memory base Address

Field

Name

Type

Default

Description

15:1

R/W

Reserved. The output value is undefined if software read this field.

DECODE_EN

R/W

16-bit decode enable

Set to ‘1’ to start decoding.

MEMBAS6--Memory base Address + 6

Field

Name

Type

Default

Description

15:8

R/W

Reserved. The output value is undefined if software read this field.

7:0

WINSIZE

R/W

0x00

Window Base Pointer. (The MSB of new window base address, 16-bit offset)

This field defines another new windows base address for TX, RX and register

access.

The total size is 8K bytes.

TX areas occupy 3840 bytes

Registers occupy 256 bytes.

RX areas occupy 4096 bytes.

Note: The WINSIZE field of this address is used to define the MSB of new window base address, the TX buffer, RX buffer

and registers should be accessed through this new window base address in 16-bit mode. Please refer to below mapping

mechanism for details.

L ittle -e n d ia n

D [31 :24]

D [23 :1 6]

D [1 5:8]

D [7 :0]

D [7:0]

D [1 5:0]

D [2 3:16 ]

D [31 :24 ]

B ig -end ian

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