AX88180 datasheet(18/47 Pages) ASIX

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AX88180

ASIX ELECTRONICS CORPORATION

4.4 TX_CFG--TX Configuration Register

Offset Address = 0xFC10

Default = 0x0000_0040

Field

Name

Type

Default

Description

31:7

All 0’s

Reserved

TXCRCAP

R/W

TXCRC Auto-Append

When this bit is enabled, AX88180 will append CRC to the transmitted

packet in FCS field.

1 = enable

0 = disable

R/W

Reserved.

TXCHKSUM

R/W

TX Checksum Generation

When this bit is enabled, AX88180 will append checksum to the transmitted

packet that is IP or TCP or UDP packet.

1 = enable

0 = disable

3:2

Reserved

1:0

TXDS

TX Description Status

AX88180 reports which descriptor is transmitted now

Default: 2’b00

4.5 TX_CMD--TX Command Register

Offset Address = 0xFC14

Default = 0x0000_0000

Field

Name

Type

Default

Description

31:16

All 0’s

Reserved

HWI

R/W

Host Writes Indication

Before host begins to send a packet to TX buffer, this bit should be set.

the end of host writes the packet, this bit should be cleared by software.

1 = Start Writing

0 = End Writing

14:13

TXDP

R/W

TX Descriptor Pointer

To specify which TX descriptor to be written.

R/W

Reserved

11:0

DATALEN

R/W

All 0’s

Byte Count.

Data length is written to transmitted buffer.

4.6 TXBS--TX Buffer Status Register

Offset Address = 0xFC18

Default = 0x0000_0000

Field

Name

Type

Default

Description

31:4

All 0’s

Reserved

INTXDS

Internal TX descriptor status.

This bit reports the TX descriptor status. When there is data to be transmitted,

this bit will be set to ‘1’ otherwise it will be ‘0’

1 = have data in TX buffer

0 = all data are transmitted to PHY

7:6

Reserved

5:4

TXDUSE

TX Descriptor In Transmitting

These status bits indicate which descriptor is transmitting now.

00: Descriptor 0 in transmitting

01: Descriptor 1 in transmitting

10: Descriptor 2 in transmitting

11: Descriptor 3 in transmitting

TXD3O

R/W

TX Descriptor 3 Occupied

Driver set this bit to ‘1’ to indicate that it had used TX descriptor3. When the

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