DM9621 datasheet(35/66 Pages) DAVICOM

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DM9621

USB2.0 to Fast Ethernet Controller

Preliminary

Version: DM9621 -14-DS-P02

February 23, 2011

6.9 DAVICOM Specified Configuration and Status Register (DSCSR) – 11H

Bit

Bit Name

Default

Description

100FDX

1, RO

100M full duplex operation mode:

After auto-negotiation is completed, results will be written to this bit.

If this bit is 1, it means the operation 1 mode is a 100M full duplex

mode. The software can read bit[15:12] to see which mode is

selected after auto-negotiation. This bit is invalid when it is not in

the auto-negotiation mode.

100HDX

1, RO

100M half duplex operation mode:

After auto-negotiation is completed, results will be written to this bit.

If this bit is 1, it means the operation 1 mode is a 100M half duplex

mode. The software can read bit[15:12] to see which mode is

selected after auto-negotiation. This bit is invalid when it is not in

the auto-negotiation mode.

10FDX

1, RO

10M full duplex operation mode:

After auto-negotiation is completed, results will be written to this bit.

If this bit is 1, it means the operation 1 mode is a 10M Full Duplex

mode. The software can read bit[15:12] to see which mode is

selected after auto-negotiation. This bit is invalid when it is not in

the auto-negotiation mode.

10HDX

1, RO

10M half duplex operation mode:

After auto-negotiation is completed, results will be written to this bit.

If this bit is 1, it means the operation 1 mode is a 10M half duplex

mode. The software can read bit[15:12] to see which mode is

selected after auto-negotiation. This bit is invalid when it is not in

the auto-negotiation mode.

11-9

RESERVED

0, RO

Reserved:

Write as 0, ignore on read

8-4

PHYADR[4:0]

(PHYADR),

PHY address Bit 4:0:

The first PHY address bit transmitted or received is the MSB of the

address (bit 4). A station management entity connected to multiple

PHY entities must know the appropriate address of each PHY.

3-0

ANMB[3:0]

0, RO

Auto-negotiation monitor bits:

These bits are for debug only. The auto-negotiation status will be

written to these bits.

B3 b2 b1 b0

0000

In IDLE state

0001

Ability match

0010

Acknowledge match

0011

Acknowledge match fail

0100

Consistency match

0101

Consistency match fail

0110

Parallel detects signal_link_ready

0111

Parallel detects signal_link_ready fail

1000

Auto-negotiation completed successfully

DM9621 Datasheet(PDF) 35 Page - Davicom Semiconductor, Inc.

DM9621 Datasheet(HTML) 35 Page - Davicom Semiconductor, Inc.

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