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DM9621 Datasheet(PDF) 23 Page - Davicom Semiconductor, Inc.

Part # DM9621
Description  USB2.0 to 10/100M Fast Ethernet Controller
PDF  66 Pages
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Manufacturer  DAVICOM [Davicom Semiconductor, Inc.]
Direct Link  http://www.davicom.com.tw
Logo DAVICOM - Davicom Semiconductor, Inc.

DM9621 Datasheet(HTML) 23 Page - Davicom Semiconductor, Inc.

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DM9621
USB2.0 to Fast Ethernet Controller
Preliminary
23
Version: DM9621 -14-DS-P02
February 23, 2011
4.24 Receive Check Sum Control Status Register (32H)
Bit
Name
Default
Description
7
UDPS
HPS0,RO
UDP Checksum Status
0: UDP packet checksum OK, or this is not UDP packet
1: UDP packet checksum error
6
TCPS
HPS0,RO
TCP Checksum Status
0: TCP packet checksum OK, or this is not TCP packet
1: TCP packet checksum error
5
IPS
HPS0,RO
IP Checksum Status
0: IP packet checksum OK, this is not IP packet
1: IP packet checksum error
4
UDPP
HPS0,RO
UDP Packet
3
TCPP
HPS0,RO
TCP Packet
2
IPP
HPS0,RO
IP Packet
1
RCSEN
HPS0,RW Receive Checksum Checking Enable
When set, the checksum status will store in packet first byte of status header in RX
DM9621 mode.
0
DCSE
HPS0,RW Discard Checksum Error Packet
When set, if IP/TCP/UDP checksum field is error, this packet will be discarded.
4.25 External PHYceiver Address Register (33H)
Bit
Name
Default
Description
7
ADR_EN
HPS0,RW
External PHY Address Enabled
When set in external MII mode, the external PHYceiver address is defined at bit
4~0.
6~5
Reserved
HPS0,RO
Reserved
4~0
EPHYADR
HPS01,RW
External PHY Address Bit 4~0
The PHY address in external MII mode.
4.26 General Purpose Control Register 2 (34H)
Bit
Name
Default
Description
7~0
GPC2
HP0,RW
General Purpose Control 2
Define the input mode (“0”,) or output mode (“1”) of pins GP_GRP2.
Where the GP_GRP2 are pins GPIO2 listed in pin description
4.27 General Purpose Register 2 (35H)
Bit
Name
Default
Description
7~0
GPD2
HP0,RW
General Purpose Register 2 Data
When the correspondent bit of General Purpose Control Register 2 is set, i.e.
output mode, the value of the bit is reflected to pins GP_GPR2
When the correspondent bit of General Purpose Control Register 2 is 0, i.e. input
mode, the value of the bit to be read is reflected from correspondent pins
GP_GPR2



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