DM9621 datasheet(16/66 Pages) DAVICOM

16 / 66 page

DM9621

USB2.0 to Fast Ethernet Controller

Preliminary

Version: DM9621 -14-DS-P02

February 23, 2011

4.3 TX Control Register (02H)

Bit

Name

Default

Description

RESERVED

0,RO

Reserved

TJDIS

PHS0,RW Transmit Jabber Disable

When set, the transmit Jabber Timer(2048 bytes) is disabled. Otherwise the

transmit packet size can more than 2048-byte.

EXCECM

PHS0,RW Excessive Collision Mode Control :

0:abort this packet when excessive collision count more than 15,

1: still try to transmit this packet

RESERVED

PHS0,RW Reserved

RESERVED

PHS0,RW Reserved

PAD_DIS1

PHS0,RW TX Packet PAD Append Control:

0: the transmit packet size is appended to at least 64-byte.

1: the transmit packet size is unchanged from original setting.

CRC_DIS1

PHS0,RW TX Packet Index II CRC Appends Control:

0: the CRC field is appended automatically.

1: the CRC field is not appended.

RESERVED

PHS0,RW Reserved

4.4 RX Control Register ( 05H )

Bit

Name

Default

Description

HASHALL

PHS0,RW

Filter All address in Hash Table

WTDIS

PHS0,RW Watchdog Timer Disable

When set, the Watchdog Timer(2048 bytes) is disabled and the RX packet may

more than 2048-byte.

When cleared, the Watchdog Timer(2048 bytes) is enabled and he RX packet is

truncated after the data more than 2048-byte

DIS_LONG

PHS0,RW Discard Long Packet

When set, the packets with length over 1522-byte are discarded from RX memory.

DIS_CRC

PHS0,RW Discard CRC Error Packet

When set, the packets with CRC error are discarded from RX memory.

ALL

PHS0,RW Pass All Multicast

When set, the packets with multicast destination address are stored to RX memory.

RUNT

PHS0,RW Pass Runt Packet

When set, the packets with size less than 64-byte are stored to RX memory.

PRMSC

PHS0,RW Promiscuous Mode

When set, the destination address is do not be checked.

RXEN

PHS0,RW RX Enable

When set, the received accepted packets can be stored to RX memory.

DM9621 Datasheet(PDF) 16 Page - Davicom Semiconductor, Inc.

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