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DM9621 Datasheet(PDF) 14 Page - Davicom Semiconductor, Inc. |
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DM9621 Datasheet(HTML) 14 Page - Davicom Semiconductor, Inc. |
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14 / 66 page ![]() DM9621 USB2.0 to Fast Ethernet Controller Preliminary 14 Version: DM9621 -14-DS-P02 February 23, 2011 USBDA USB device address register F0H 00H RXC Received packet counter register F1H 00H TXC/USBS Transmit packet counter/USB status register F2H 10H USBC USB control register F4H 00H Key to Default In the register description that follows, the default column takes the form: <Reset Value>, <Access Type> Where: <Reset Value>: 1 Bit set to logic one 0 Bit set to logic zero X No default value P = power on reset default value H = hardware reset command default value S = software reset default value E = default value from EEPROM T = default value from strap pin <Access Type>: RO = Read only RW = Read/Write R/C = Read and Clear RW/C1=Read/Write and Cleared by write 1 WO = Write only Reserved bits are shaded and should be written with 0. Reserved bits are undefined on read access. 4.1 Network Control Register (00H) Bit Name Default Description 7 EXT_PHY PT0,RW External PHY mode (valid when pin TEST1 tie to ground) 1: Select external PHY 0: select Internal PHY. This bit can be forced by register 2DH bit 5. 6 WAKEEN PE0,RW Wakeup event enable When set, it enables the wakeup function. Clearing this bit will also clear all wakeup event status. 5 WCR_MODE PHS,RW Write To Clear Mode When set, the following register bits are cleared by write ‘1” . Register 1 bit 2 and 3 Register 7 Register 0AH bit 2 Register 82H ~ 86H 4 FCOL PHS0,RW Force Collision in Loopback Mode Used for testing only. 3 FDX PHS0,RW Full-Duplex mode. 1: Full-Duplex mode 0: Half-Duplex mode Read only in Internal PHY mode. This bit can be written only in External PHY mode. This bit can also be forced by register 2EH bit 5 and 1. 2:1 LBK PH00,RW Loopback mode Bit 2 1 0 0 normal 0 1 MAC internal loopback 1 0 internal PHY digital loopback 1 1 internal PHY analog loopback 0 RST PH0,RW Software Reset When write “1” to this bit, DM9621 enters software reset mode and will be automatically cleared after 10us. Write “0” to this bit can end the software reset mode. |
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