DM9621 datasheet(32/66 Pages) DAVICOM

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DM9621

USB2.0 to Fast Ethernet Controller

Preliminary

Version: DM9621 -14-DS-P02

February 23, 2011

0, RW

Remote fault:

1 = Local device senses a fault condition

0 = No fault detected

12-11

RESERVED

X, RW

Reserved:

Write as 0, ignore on read

FCS

0, RW

Flow control support:

1 = Controller chip supports flow control ability

0 = Controller chip doesn’t support flow control ability

0, RO/P

100BASE-T4 support:

1 = 100BASE-T4 is supported by the local device

0 = 100BASE-T4 is not supported

The PHY does not support 100BASE-T4 so this bit is permanently

set to 0

TX_FDX

1, RW

100BASE-TX full duplex support:

1 = 100BASE-TX full duplex is supported by the local device

0 = 100BASE-TX full duplex is not supported

TX_HDX

1, RW

100BASE-TX support:

1 = 100BASE-TX is supported by the local device

0 = 100BASE-TX is not supported

10_FDX

1, RW

10BASE-T full duplex support:

1 = 10BASE-T full duplex is supported by the local device

0 = 10BASE-T full duplex is not supported

10_HDX

1, RW

10BASE-T support:

1 = 10BASE-T is supported by the local device

0 = 10BASE-T is not supported

4-0

Selector

<00001>, RW

Protocol selection bits:

These bits contain the binary encoded protocol selector supported

by this node.

<00001> indicates that this device supports IEEE 802.3

CSMA/CD.

6.6 Auto-negotiation Link Partner Ability Register (ANLPAR) – 05H

This register contains the advertised abilities of the link partner when received during Auto-negotiation.

Bit

Bit Name

Default

Description

0, RO

Next page indication:

0 = Link partner, no next page available

1 = Link partner, next page available

ACK

0, RO

Acknowledge:

1 = Link partner ability data reception acknowledged

0 = Not acknowledged

The PHY's auto-negotiation state machine will automatically

control this bit from the incoming FLP bursts. Software should not

attempt to write to this bit.

0, RO

Remote Fault:

1 = Remote fault indicated by link partner

0 = No remote fault indicated by link partner

12-11

RESERVED

X, RO

Reserved:

Write as 0, ignore on read

FCS

0, RW

Flow control support:

1 = Controller chip supports flow control ability by link partner

DM9621 Datasheet(PDF) 32 Page - Davicom Semiconductor, Inc.

DM9621 Datasheet(HTML) 32 Page - Davicom Semiconductor, Inc.

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