DM9621 datasheet(37/66 Pages) DAVICOM

37 / 66 page

DM9621

USB2.0 to Fast Ethernet Controller

Preliminary

Version: DM9621 -14-DS-P02

February 23, 2011

6.12 (Specified config) Register – 14H

Bit

Bit Name

Default

Description

TSTSE1

0,RW

Vendor test select control

TSTSE2

0,RW

Vendor test select control

FORCE_TXSD

0,RW

Force Signal Detect

1: force SD signal OK in 100M

0: normal SD signal.

FORCE_FEF

0,RW

Vendor test select control

PREAMBLEX

1,RW

Preamble Saving Control

0: when bit 10 is set, the 10BASE-T transmit preamble count is

reduced. When bit 11 of register 1DH is set, 12-bit preamble is

reduced; otherwise 22-bit preamble is reduced.

1: transmit preamble bit count is normal in 10BASE-T mode

TX10M_PWR

1,RW

10BASE-T mode Transmit Power Saving Control

1: enable transmit power saving in 10BASE-T mode

0: disable transmit power saving in 10BASE-T mode

NWAY_PWR

0,RW

Auto-negotiation Power Saving Control

1: disable power saving during auto-negotiation period

0: enable power saving during auto-negotiation period

Reserved

0, RW

Reserved

MDIX_CNTL

MDI/MDIX,RO The polarity of MDI/MDIX value

1: MDIX mode

0: MDI mode

AutoNeg_lpbk

0,RW

Auto-negotiation Loop-back

1: test internal digital auto-negotiation Loop-back

0: normal.

Mdix_fix Value

0, RW

MDIX_CNTL force value:

When Mdix_down = 1, MDIX_CNTL value depend on the register

value.

Mdix_do wn

0,RW

MDIX Down

Manual force MDI/MDIX.

1: Disable HP Auto-MDIX , MDIX_CNTL value depend

on 20.5

0: Enable HP Auto-MDIX

MonSel1

0,RW

Vendor monitor select

MonSel0

0,RW

Vendor monitor select

Reserved

0,RW

Reserved

DM9621 Datasheet(PDF) 37 Page - Davicom Semiconductor, Inc.

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