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DM9621 Datasheet(PDF) 33 Page - Davicom Semiconductor, Inc.

Part # DM9621
Description  USB2.0 to 10/100M Fast Ethernet Controller
PDF  66 Pages
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Manufacturer  DAVICOM [Davicom Semiconductor, Inc.]
Direct Link  http://www.davicom.com.tw
Logo DAVICOM - Davicom Semiconductor, Inc.

DM9621 Datasheet(HTML) 33 Page - Davicom Semiconductor, Inc.

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DM9621
USB2.0 to Fast Ethernet Controller
Preliminary
33
Version: DM9621 -14-DS-P02
February 23, 2011
0 = Controller chip doesn’t support flow control ability by link
partner
9
T4
0, RO
100BASE-T4 support:
1 = 100BASE-T4 is supported by the link partner
0 = 100BASE-T4 is not supported by the link partner
8
TX_FDX
0, RO
100BASE-TX full duplex support:
1 = 100BASE-TX full duplex is supported by the link partner
0 = 100BASE-TX full duplex is not supported by the link partner
7
TX_HDX
0, RO
100BASE-TX support:
1 = 100BASE-TX half duplex is supported by the link partner
0 = 100BASE-TX half duplex is not supported by the link partner
6
10_FDX
0, RO
10BASE-T full duplex support:
1 = 10BASE-T full duplex is supported by the link partner
0 = 10BASE-T full duplex is not supported by the link partner
5
10_HDX
0, RO
10BASE-T support:
1 = 10BASE-T half duplex is supported by the link partner
0 = 10BASE-T half duplex is not supported by the link partner
4-0
Selector
<00000>, RO
Protocol selection bits:
Link partner’s binary encoded protocol selector
6.7 Auto-negotiation Expansion Register (ANER)- 06H
Bit
Bit Name
Default
Description
15-5
RESERVED
X, RO
Reserved:
Write as 0, ignore on read
4
PDF
0, RO/LH
Local device parallel detection fault:
PDF = 1 : A fault detected via parallel detection function.
PDF = 0 : No fault detected via parallel detection function
3
LP_NP_ABLE
0, RO
Link partner next page able:
LP_NP_ABLE = 1 : Link partner, next page available
LP_NP_ABLE = 0 : Link partner, no next page
2
NP_ABLE
0,RO/P
Local device next page able:
NP_ABLE = 1 : next page available
NP_ABLE = 0 : no next page
1
PAGE_RX
0, RO/LH
New page received:
A new link code word page received. This bit will be automatically
cleared when the register (register 6) is read by management.
0
LP_AN_ABLE
0, RO
Link partner auto-negotiation able:
A “1” in this bit indicates that the link partner supports
Auto-negotiation.
6.8 DAVICOM Specified Configuration Register (DSCR) – 10H
Bit
Bit Name
Default
Description
15
BP_4B5B
0, RW
Bypass 4B5B encoding and 5B4B decoding :
1 = 4B5B encoder and 5B4B decoder function bypassed
0 = Normal 4B5B and 5B4B operation
14
BP_SCR
0, RW
Bypass scrambler/descrambler function :
1 = Scrambler and descrambler function bypassed
0 = Normal scrambler and descrambler operation
13
BP_ALIGN
0, RW
Bypass symbol alignment function:
1 = Receive functions (descrambler, symbol alignment and



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