DM9621 datasheet(19/66 Pages) DAVICOM

19 / 66 page

DM9621

USB2.0 to Fast Ethernet Controller

Preliminary

Version: DM9621 -14-DS-P02

February 23, 2011

4.9 RX/TX Flow Control Register ( 0AH )

Bit

Name

Default

Description

TXP0

PHS0,RW

Force to TX Pause Packet with Time 0000H,:

This bit will be automatically cleared after pause packet transmission

completion.

Set to TX pause packet with time = 0000H

TXPF

PHS0,RW

Force to TX Pause Packet with Time FFFFH:

This bit will be automatically cleared after pause packet transmission

completion.

Set to TX pause packet with time = FFFFH.

TXPEN

PHS0,RW

TX Pause Packet Enable

Enable the pause packet for high/low water threshold of register 09H in

full-duplex mode.

BKPA

PHS0,RW

Back Pressure Packet Mode Enable:

Generate a jam pattern when any packet coming and RX SRAM over BPHW

of register 8H in half-duplex mode.

BKPM

PHS0,RW

Back Pressure DA Mode.

Generate a jam pattern when a packet’s DA match and RX SRAM over

BPHW of register 8H in half-duplex mode.

RXPS

PHS0,RW/C

RX Pause Packet Status:

This bit latched the RX pause packet in full-duplex mode.

This bit can be cleared by write “1” to this bit or cleared automatically after

read if register 0H bit 5 is “0”.

RXPCS

PHS0,RO

RX Pause Packet Current Status:

When set, it indicated that the pause timer is not down count to “0” yet.

FLCE

PHS0,RW

Flow Control Enable

When set, it enable the flow control mode(i.e. can to disable TX function).

4.10 EEPROM & PHY Control Register ( 0BH )

Bit

Name

Default

Description

NO_EEP

P0,RO

EEPROM Absent

When set, it indicates the EEPROM 93C46 or 93C56/66 is not detected.

EE_TYPE

P0,RO

EEPROM type

0: 93C46

1: 93C56/66

REEP

PH0,RW

Reload EEPROM.

When set, the EEPROM is re-loaded.

Driver needs to clear it after operation complete.

WEP

PH0,RW

Write EEPROM enable

The written ability of EEPROM is enabled.

EPOS

PH0,RW

EEPROM or PHY Operation Select

When reset, select EEPROM;

when set, select PHY.

ERPRR

PH0,RW

EEPROM Read or PHY Register Read Command.

Write “1” to start EEPROM or PHY read operation.

This bit will be cleared after the completion of read operation.

ERPRW

PH0,RW

EEPROM Write or PHY Register Write Command.

Write “1” to start EEPROM or PHY write operation.

This bit will be cleared after the completion of write operation

DM9621 Datasheet(PDF) 19 Page - Davicom Semiconductor, Inc.

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