UPSD3312D datasheet(229/272 Pages) STMICROELECTRONICS

229 / 272 page

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UPSD33xx

PSD module

Doc ID 9685 Rev 7

229/272

Figure 77.

Automatic Power-down (APD) unit

Figure 78.

Power-down mode flowchart

PMMR0, BIT 1 (APD EN)

8032 ALE

PSD MODULE RST_

CSI (pin PD2)

CLKIN (pin PD1)

PDN

OMC OUTPUTS

FSx

CSBOOTx

RS0

CSIOP

8032 DATA FROM MCU MODULE

8032 ADDR FROM MCU MODULE

PDN

CSI

PMMR3, BIT 1 (FORCE_PD)

ENABLE

1 = FOUND

TRANSITION

1 = FOUND

EDGE

CLEAR

FULL

COUNT

DPLD CHIP

SELECT

EQUATIONS

GPLD

TRANSITION

DETECTION

EDGE

DETECTION

4-BIT APD

UP-COUNTER

ENABLE

CLK

1 = POWER

DOWN MODE

ENABLE

PSD

MODULE

LINE

BUFFERS

8032 DATA

8032 ADDR

WHEN CSI FUNCTION IS SPECIFIED IN PSDSOFT EXPRESS,

CSI IS PART OF EQUATIONS FOR FSx, CSBOOTx, RS0, and CSIOP

AI06608B

Enable APD.

Set PMMR0,

Bit 1 = 1

RESET

OPTIONAL. Disable desired inputs to

PLDs by setting PMMR0 bits 4 and 5,

and PMMR2 bits 2 through 6

ALE idle

for 15 CLKIN

clocks?

PDN = 1, PSD

Module in Power-

Down Mode

YES

AI09183

UPSD3312D Datasheet(PDF) 229 Page - STMicroelectronics

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