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ADV7181BBCPZ Datasheet(PDF) 41 Page - Analog Devices |
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ADV7181BBCPZ Datasheet(HTML) 41 Page - Analog Devices |
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41 / 96 page ![]() ADV7181B Rev. 0 | Page 41 of 96 Table 54. Recommended User Settings for NTSC (See Figure 21) Register Register Name Write 0x31 VSync Field Control 1 0x12 0x32 VSync Field Control 2 0x81 0x33 VSync Field Control 3 0x84 0x37 Polarity 0x29 0xE5 NTSV_V_Bit_Beg 0x0 0xE6 NTSC_V_Bit_End 0x3 0xE7 NTSC_F_Bit_Tog 0x85 ADVANCE BEGIN OF VSYNC BY NVBEG[4:0] DELAY BEGIN OF VSYNC BY NVBEG[4:0] VSYNC BEGIN NVBEGSIGN ODD FIELD? 0 1 NO YES NVBEGDELO VSBHO ADDITIONAL DELAY BY 1 LINE ADVANCE BY 0.5 LINE 1 0 1 0 NVBEGDELE VSBHE ADDITIONAL DELAY BY 1 LINE ADVANCE BY 0.5 LINE 1 0 1 0 NOT VALID FOR USER PROGRAMMING Figure 22. NTSC VSync Begin NVBEGDELO NTSC VSync Begin Delay on Odd Field, Address 0xE5 [7] When NVBEGDELO is 0 (default), there is no delay. Setting NVBEGDELO to 1 delays VSync going high on an odd field by a line relative to NVBEG. NVBEGDELE NTSC Vsync Begin Delay on Even Field, Address 0xE5 [6] When NVBEGDELE is 0 (default), there is no delay. Setting NVBEGDELE to 1 delays VSync going high on an even field by a line relative to NVBEG. NVBEGSIGN NTSC VSync Begin Sign, Address 0xE5 [5] Setting NVBEGSIGN to 0 delays the start of VSync. Set for user manual programming. Setting NVBEGSIGN to 1 (default) advances the start of VSync. Not recommended for user programming. NVBEG[4:0] NTSC VSync Begin, Address 0xE5 [4:0] The default value of NVBEG is 00101, indicating the NTSC VSync begin position. For all NTSC/PAL VSync timing controls, both the V bit in the AV code and the VSync on the VS pin are modified. ADVANCE END OF VSYNC BY NVEND[4:0] DELAY END OF VSYNC BY NVEND[4:0] VSYNC END NVENDSIGN ODD FIELD? 0 1 NO YES NVENDDELO VSEHO ADDITIONAL DELAY BY 1 LINE ADVANCE BY 0.5 LINE 1 0 1 0 NVENDDELE VSEHE ADDITIONAL DELAY BY 1 LINE ADVANCE BY 0.5 LINE 1 0 1 0 NOT VALID FOR USER PROGRAMMING Figure 23. NTSC VSync End NVENDDELO NTSC VSync End Delay on Odd Field, Address 0xE6 [7] When NVENDDELO is 0 (default), there is no delay. Setting NVENDDELO to 1 delays VSync from going low on an odd field by a line relative to NVEND. |
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