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ADV7181BBCPZ Datasheet(PDF) 48 Page - Analog Devices |
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ADV7181BBCPZ Datasheet(HTML) 48 Page - Analog Devices |
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48 / 96 page ![]() ADV7181B Rev. 0 | Page 48 of 96 CGMS Data Registers CGMS1[7:0], Address 0x96 [7:0], CGMS2[7:0], Address 0x97 [7:0], CGMS3[7:0], Address 0x98 [7:0] Figure 32 shows the bit correspondence between the analog video waveform and the CGMS1/CGMS2/CGMS3 registers. CGMS3[7:4] are undetermined and should be masked out by software. Closed Caption Data Registers CCAP1[7:0], Address 0x99 [7:0], CCAP2[7:0], Address 0x9A [7:0] Figure 33 shows the bit correspondence between the analog video waveform and the CCAP1/CCAP2 registers. CCAP1[7] contains the parity bit from the first word. CCAP2[7] contains the parity bit from the second word. Refer to the GDECAD Gemstar Decode Ancillary Data Format, Address 0x4C [0] section. 01 2 3 4 5 6 7 0 1 2 3 4 5 6 7 0 1 2 3 CGMS2[7:0] CGMS3[3:0] CGMS1[7:0] REF +100 IRE +70 IRE 0 IRE –40 IRE 11.2 µs 49.1 µs ± 0.5µs CRC SEQUENCE 2.235 µs ± 20ns Figure 32. CGMS Data Extraction Table 58. CGMS Access Information Signal Name Register Location Address Register Default Value CGMS1[7:0] CGMS 1 [7:0] 150d 0x96 Readback Only CGMS2[7:0] CGMS 2 [7:0] 151d 0x97 Readback Only CGMS3[3:0] CGMS 3 [3:0] 152d 0x98 Readback Only 0 REFERENCE COLOR BURST (9 CYCLES) FREQUENCY = FSC = 3.579545MHz AMPLITUDE = 40 IRE 1 CCAP1[7:0] 7 CYCLES OF 0.5035MHz (CLOCK RUN-IN) CCAP2[7:0] 2 3 4 5 6 7 0 1 2 3 4 5 67 P A R I T Y S T A R T P A R I T Y BYTE 1 BYTE 0 33.764 µs 10.003 µs 10.5 ± 0.25µs 12.91 µs 27.382 µs 50 IRE 40 IRE Figure 33. Closed Caption Data Extraction Table 59. CCAP Access Information Signal Name Register Location Address Register Default Value CCAP1[7:0] CCAP 1 [7:0] 153d 0x99 Readback Only CCAP2[7:0] CCAP 2 [7:0] 154d 0x9A Readback Only |
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