ADV7181BBCPZ datasheet(42/96 Pages) AD

42 / 96 page

ADV7181B

Rev. 0 | Page 42 of 96

NVENDDELE NTSC VSync End Delay on Even Field,

Address 0xE6 [6]

When NVENDDELE is set to 0 (default), there is no delay.

Setting NVENDDELE to 1 delays VSync from going low on an

even field by a line relative to NVEND.

NVENDSIGN NTSC VSync End Sign, Address 0xE6 [5]

Setting NVENDSIGN to 0 (default) delays the end of VSync. Set

for user manual programming.

Setting NVENDSIGN to 1 advances the end of VSync. Not

recommended for user programming.

NVEND NTSC[4:0] VSync End, Address 0xE6 [4:0]

The default value of NVEND is 00100, indicating the NTSC

VSync end position.

For all NTSC/PAL VSync timing controls, both the V bit in the

AV code and the VSync on the VS pin are modified.

NFTOGDELO NTSC Field Toggle Delay on Odd Field,

Address 0xE7 [7]

When NFTOGDELO is 0 (default), there is no delay.

Setting NFTOGDELO to 1 delays the field toggle/transition on

an odd field by a line relative to NFTOG.

NFTOGDELE NTSC Field Toggle Delay on Even Field,

Address 0xE7 [6]

When NFTOGDELE is 0, there is no delay.

Setting NFTOGDELE to 1 (default) delays the field toggle/

transition on an even field by a line relative to NFTOG.

ADVANCE TOGGLE OF

FIELD BY NFTOG[4:0]

DELAY TOGGLE OF

FIELD BY NFTOG[4:0]

NFTOGSIGN

ODD FIELD?

YES

NFTOGDELE

ADDITIONAL

DELAY BY

1 LINE

NFTOGDELO

ADDITIONAL

DELAY BY

1 LINE

FIELD

TOGGLE

NOT VALID FOR USER

PROGRAMMING

Figure 24. NTSC FIELD Toggle

NFTOGSIGN NTSC Field Toggle Sign, Address 0xE7 [5]

Setting NFTOGSIGN to 0 delays the field transition. Set for

user manual programming.

Setting NFTOGSIGN to 1 (default) advances the field

transition. Not recommended for user programming.

NFTOG[4:0] NTSC Field Toggle, Address 0xE7 [4:0]

The default value of NFTOG is 00011, indicating the NTSC

Field toggle position.

For all NTSC/PAL Field timing controls, both the F bit in the

AV code and the Field signal on the FIELD/DE pin are modified.

Table 55. Recommended User Settings for PAL

(see Figure 26)

Write

0x31

VSync Field Control 1

0x12

0x32

VSync Field Control 2

0x81

0x33

VSync Field Control 3

0x84

0x37

Polarity

0x29

0xE8

PAL_V_Bit_Beg

0x1

0xE9

PAL_V_Bit_End

0x4

0xEA

PAL_F_Bit_Tog

0x6

ADV7181BBCPZ Datasheet(PDF) 42 Page - Analog Devices

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