PLQP0048KB-B datasheet(41/177 Pages) RENESAS

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R01DS0261EJ0110 Rev.1.10

Page 41 of 177

Oct 30, 2015

RX230 Group, RX231 Group

4. I/O Registers

I/O Registers

This section provides information on the on-chip I/O register addresses and bit configuration. The information is given as

shown below. Notes on writing to registers are also given below.

(1)

I/O register addresses (address order)

 Registers are listed from the lower allocation addresses.

 Registers are classified according to module symbols.

 Numbers of cycles for access indicate numbers of cycles of the given base clock.

 Among the internal I/O register area, addresses not listed in the list of registers are reserved. Reserved addresses

must not be accessed. Do not access these addresses; otherwise, the operation when accessing these bits and

subsequent operations cannot be guaranteed.

(2)

Notes on writing to I/O registers

When writing to an I/O register, the CPU starts executing the subsequent instruction before completing I/O register write.

This may cause the subsequent instruction to be executed before the post-update I/O register value is reflected on the

operation.

As described in the following examples, special care is required for the cases in which the subsequent instruction must be

executed after the post-update I/O register value is actually reflected.

[Examples of cases requiring special care]

 The subsequent instruction must be executed while an interrupt request is disabled with the IENj bit in IERn of the

ICU (interrupt request enable bit) cleared to 0.

 A WAIT instruction is executed immediately after the preprocessing for causing a transition to the low power

consumption state.

In the above cases, after writing to an I/O register, wait until the write operation is completed using the following

procedure and then execute the subsequent instruction.

(a)

Write to an I/O register.

(b) Read the value from the I/O register to a general register.

(c)

Execute the operation using the value read.

(d) Execute the subsequent instruction.

[Instruction examples]

 Byte-size I/O registers

MOV.L #SFR_ADDR, R1

MOV.B #SFR_DATA, [R1]

CMP

[R1].UB, R1

;; Next process

 Word-size I/O registers

MOV.L #SFR_ADDR, R1

MOV.W #SFR_DATA, [R1]

CMP

[R1].W, R1

;; Next process

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