HC08KL8GRSSLASHD datasheet(33/256 Pages) NXP

Part #	HC08KL8GRS/D

Description	High-Performance M68HC08 Architecture

PDF	256 Pages

Scroll/Zoom	100%

Manufacturer	NXP [NXP Semiconductors]

Direct Link	http://www.nxp.com

Logo

33 / 256 page

General Description

Pin Assignments

MC68HC08KL8 — Rev. 2.0

General Release Specification

General Description

1.5.10 Port D I/O Pins (PTD7/KBD7–PTD0/KBD0)

PTD7/KBD7–PTD0/KBD0 are general-purpose bidirectional I/O port

pins. (See Section 12. Input/Output Ports (I/O).) Any or all of the port

D pins can be programmed to serve as external interrupt pins. (See

Section 15. Keyboard Interrupt Module (KBI).)

1.5.11 Port E I/O Pins (PTE6–PTE3 and PTE2/TCH1, PTE1/TCH0, PTE0/TCLK)

Port E is a 7-bit special function port that shares three of its pins with the

timer interface module. (Section 11. Timer Interface Module (TIM) and

Section 12. Input/Output Ports (I/O).)

NOTE:

On the 42-lead SDIP package the port E pads are not bonded out. Set

these ports to output to avoid floating inputs.

Freescale Semiconductor, Inc.

For More Information On This Product,

Go to: www.freescale.com

HC08KL8GRS/D Datasheet(PDF) 33 Page - NXP Semiconductors