HC08KL8GRSSLASHD datasheet(75/256 Pages) NXP

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Oscillator

I/O Signals

MC68HC08KL8 — Rev. 2.0

General Release Specification

Oscillator

The series resistor (R

S) is included in the diagram to follow strict Pierce

oscillator guidelines and may not be required for all ranges of operation,

especially with high-frequency crystals. Refer to the crystal

manufacturer’s data for more information.

7.4 I/O Signals

The following paragraphs describe the oscillator input/output (I/O)

signals.

7.4.1 Crystal Amplifier Input Pin (OSC1)

The OSC1 pin is an input to the crystal oscillator amplifier.

7.4.2 Crystal Amplifier Output Pin (OSC2)

The OSC2 pin is the output of the crystal oscillator inverting amplifier.

7.4.3 Oscillator Enable Signal (SIMOSCEN)

The SIMOSCEN signal comes from the system integration module (SIM)

and enables the oscillator.

7.4.4 External Clock Source (CGMXCLK)

CGMXCLK is the crystal oscillator output signal. It runs at the full speed

of the crystal (f

XCLK) and comes directly from the crystal oscillator circuit.

Figure 7-1 shows only the logical relation of CGMXCLK to OSC1 and

OSC2 and may not represent the actual circuitry. The duty cycle of

CGMXCLK is unknown and may depend on the crystal and other

external factors. Also, the frequency and amplitude of CGMXCLK can be

unstable at startup.

Freescale Semiconductor, Inc.

For More Information On This Product,

Go to: www.freescale.com

HC08KL8GRS/D Datasheet(PDF) 75 Page - NXP Semiconductors