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HC08KL8GRS/D Datasheet(PDF) 38 Page - NXP Semiconductors |
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HC08KL8GRS/D Datasheet(HTML) 38 Page - NXP Semiconductors |
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38 / 256 page ![]() Memory Map General Release Specification MC68HC08KL8 — Rev. 2.0 Memory Map Addr. Name Bit 7 6 5 4 3 2 1 Bit 0 $0000 Port A Data Register (PTA) Read: PTA7 PTA6 PTA5 PTA4 PTA3 PTA2 PTA1 PTA0 Write: Reset: Unaffected by Reset $0001 Port B Data Register (PTB) Read: PTB7 PTB6 PTB5 PTB4 PTB3 PTB2 PTB1 PTB0 Write: Reset: Unaffected by Reset $0002 Port C Data Register (PTC) Read: PTC7 PTC6 PTC5 PTC4 PTC3 PTC2 PTC1 PTC0 Write: Reset: Unaffected by Reset $0003 Port D Data Register (PTD) Read: PTD7 PTD6 PTD5 PTD4 PTD3 PTD2 PTD1 PTD0 Write: Reset: Unaffected by Reset $0004 Data Direction Register A (DDRA) Read: DDRA7 DDRA6 DDRA5 DDRA4 DDRA3 DDRA2 DDRA1 DDRA0 Write: Reset: 0 0 0 0 0 0 0 0 $0005 Data Direction Register B (DDRB) Read: DDRB7 DDRB6 DDRB5 DDRB4 DDRB3 DDRB2 DDRB1 DDRB0 Write: Reset: 0 0 0 0 0 0 0 0 $0006 Data Direction Register C (DDRC) Read: DDRC7 DDRC6 DDRC5 DDRC4 DDRC3 DDRC2 DDRC1 DDRC0 Write: Reset: 0 0 0 0 0 0 0 0 $0007 Data Direction Register D (DDRD) Read: DDRD7 DDRD6 DDRD5 DDRD4 DDRD3 DDRD2 DDRD1 DDRD0 Write: Reset: 0 0 0 0 0 0 0 0 = Unimplemented R = Reserved X = Indeterminate Figure 2-2. Control, Status, and Data Registers (Sheet 1 of 9) Freescale Semiconductor, Inc. For More Information On This Product, Go to: www.freescale.com |
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