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HC08KL8GRS/D Datasheet(PDF) 67 Page - NXP Semiconductors |
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HC08KL8GRS/D Datasheet(HTML) 67 Page - NXP Semiconductors |
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67 / 256 page  Central Processor Unit (CPU) Instruction Set Summary MC68HC08KL8 — Rev. 2.0 General Release Specification Central Processor Unit (CPU) BRCLR n,opr,rel Branch if Bit n in M Clear PC ← (PC) + 3 + rel ? (Mn) = 0 – – – – – ¤ DIR (b0) DIR (b1) DIR (b2) DIR (b3) DIR (b4) DIR (b5) DIR (b6) DIR (b7) 01 03 05 07 09 0B 0D 0F dd rr dd rr dd rr dd rr dd rr dd rr dd rr dd rr 5 5 5 5 5 5 5 5 BRN rel Branch Never PC ← (PC) + 2 – – – – – – REL 21 rr 3 BRSET n,opr,rel Branch if Bit n in M Set PC ← (PC) + 3 + rel ? (Mn) = 1 – – – – – ¤ DIR (b0) DIR (b1) DIR (b2) DIR (b3) DIR (b4) DIR (b5) DIR (b6) DIR (b7) 00 02 04 06 08 0A 0C 0E dd rr dd rr dd rr dd rr dd rr dd rr dd rr dd rr 5 5 5 5 5 5 5 5 BSET n,opr Set Bit n in M Mn ← 1 –––––– DIR (b0) DIR (b1) DIR (b2) DIR (b3) DIR (b4) DIR (b5) DIR (b6) DIR (b7) 10 12 14 16 18 1A 1C 1E dd dd dd dd dd dd dd dd 4 4 4 4 4 4 4 4 BSR rel Branch to Subroutine PC ← (PC) + 2; push (PCL) SP ← (SP) – 1; push (PCH) SP ← (SP) – 1 PC ← (PC) + rel – – – – – – REL AD rr 4 CBEQ opr,rel CBEQA # opr,rel CBEQX # opr,rel CBEQ opr,X+,rel CBEQ X+ ,rel CBEQ opr,SP,rel Compare and Branch if Equal PC ← (PC) + 3 + rel ? (A) – (M) = $00 PC ← (PC) + 3 + rel ? (A) – (M) = $00 PC ← (PC) + 3 + rel ? (X) – (M) = $00 PC ← (PC) + 3 + rel ? (A) – (M) = $00 PC ← (PC) + 2 + rel ? (A) – (M) = $00 PC ← (PC) + 4 + rel ? (A) – (M) = $00 –––––– DIR IMM IMM IX1+ IX+ SP1 31 41 51 61 71 9E61 dd rr ii rr ii rr ff rr rr ff rr 5 4 4 5 4 6 CLC Clear Carry Bit C ← 0 – – – – – 0 INH 98 1 CLI Clear Interrupt Mask I ← 0 – – 0 – – – INH 9A 2 CLR opr CLRA CLRX CLRH CLR opr,X CLR ,X CLR opr,SP Clear M ← $00 A ← $00 X ← $00 H ← $00 M ← $00 M ← $00 M ← $00 0––01– DIR INH INH INH IX1 IX SP1 3F 4F 5F 8C 6F 7F 9E6F dd ff ff 3 1 1 1 3 2 4 CMP # opr CMP opr CMP opr CMP opr,X CMP opr,X CMP ,X CMP opr,SP CMP opr,SP Compare A with M (A) – (M) ¤ –– ¤¤¤ IMM DIR EXT IX2 IX1 IX SP1 SP2 A1 B1 C1 D1 E1 F1 9EE1 9ED1 ii dd hh ll ee ff ff ff ee ff 2 3 4 4 3 2 4 5 COM opr COMA COMX COM opr,X COM ,X COM opr,SP Complement (One’s Complement) M ← (M) = $FF – (M) A ← (A) = $FF – (M) X ← (X) = $FF – (M) M ← (M) = $FF – (M) M ← (M) = $FF – (M) M ← (M) = $FF – (M) 0–– ¤¤ 1 DIR INH INH IX1 IX SP1 33 43 53 63 73 9E63 dd ff ff 4 1 1 4 3 5 Table 6-1. Instruction Set Summary (Continued) Source Form Operation Description Effect on CCR VH I N Z C Freescale Semiconductor, Inc. For More Information On This Product, Go to: www.freescale.com |
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