HC08KL8GRSSLASHD datasheet(54/256 Pages) NXP

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Mask Option Register (MOR)

General Release Specification

MC68HC08KL8 — Rev. 2.0

Mask Option Register (MOR)

5.3 Functional Description

NOTE:

Writing to a reserved address can have unpredictable effects on MCU

operation.

REGBP — Regulator Bypass Bit

The REGBP causes the on-chip regulator to pass V

DDREG to the

REGOUT pin.

1 = V

DDREG voltage applied to the REGOUT pin.

0 = Regulator output drives 3.3 volts on REGOUT pin.

NOTE:

The bypass mode is reserved for transceiver testing and should not be

used in normal operation.

ROMSEC — ROM Security Bit

ROMSEC enables the ROM security feature. Setting the ROMSEC bit

prevents reading of the ROM contents. Access to the ROM is denied

to unauthorized users of customer specified software.

1 = ROM security enabled

0 = ROM security disabled

SSREC — Short Stop Recovery Bit

SSREC enables the CPU to exit stop mode with a delay of 32

CGMXCLK cycles instead of a 4096-CGMXCLK cycle delay.

1 = Stop mode recovery after 32 CGMXCLK cycles

0 = Stop mode recovery after 4096 CGMXCLK cycles

Address:

$001F

Bit 7

654321

Bit 0

Read:

REGBP

ROMSEC

SSREC

COPRS

STOP

COPD

Write:

Reset:

Unaffected by Reset

= Unimplemented

Figure 5-1. Mask Option Register (MOR)

Freescale Semiconductor, Inc.

For More Information On This Product,

Go to: www.freescale.com

HC08KL8GRS/D Datasheet(PDF) 54 Page - NXP Semiconductors

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