AMD-K6-2ESLASH233AMZ datasheet(283/332 Pages) AMD

283 / 332 page

Chapter 14

Electrical Data

265

22529B/0—January 2000

AMD-K6™-2E Processor Data Sheet

Preliminary Information

The following list characterizes the properties of the I/O buffer

model:

All data tables contain minimum, typical, and maximum

values to allow for worst-case, typical, and best-case

simulations, respectively.

The pullup, pulldown, power clamp, and ground clamp

device V/I tables contain enough data points to accurately

represent the nonlinear nature of the V/I curves. In addition,

the voltage ranges provided in these tables extend beyond

the normal operating range of the AMD-K6-2E processor for

those simulators that yield more accurate results based on

this wider range.

The rising and falling ramp rates are specified.

The min/typ/max VCC3 operating range is specified as

3.135V, 3.3V, and 3.6V, respectively.

VIL = 0.8V, VIH = 2.0V, and VMEAS = 1.5V.

The R/L/C of the package is modeled.

The capacitance of the silicon die is modeled.

The model assumes a test load resistance of 50

I/O Model

Application Note

For the AMD-K6-2E processor I/O Buffer IBIS Models and their

application, refer to the AMD-K6® Processor I/O Model (IBIS)

Application Note, order #21084.

I/O Buffer AC and DC

Characteristics

See “Signal Switching Characteristics” on page 267 for the

AMD-K6-2E processor AC timing specifications.

Us e th is c h apter f o r th e AMD-K6-2 E pr oc essor DC

specifications.

AMD-K6-2E/233AMZ Datasheet(PDF) 283 Page - Advanced Micro Devices