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AMD-K6-2E/233AMZ Datasheet(PDF) 116 Page - Advanced Micro Devices |
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AMD-K6-2E/233AMZ Datasheet(HTML) 116 Page - Advanced Micro Devices |
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116 / 332 page  98 Signal Descriptions Chapter 5 AMD-K6™-2E Processor Data Sheet 22529B/0—January 2000 Preliminary Information 5.17 D/C# (Data/Code) Pin Attribute Output Pin Location AK-04 Summary The processor drives D/C # during a memory bus cycle to indicate whether it is addressing data or executable code. D/C# is also used to define other bus cycles, including interrupt acknowledge and special cycles. See Table 23 on page 132 for more details. Driven and Floated D/C# is driven off the same clock edge as ADS# and remains in the same state until the clock edge on which NA # or the last expected BRDY # of the cycle is sampled asserted. D/C # is driven during memory cycles, I/O cycles, special bus cycles, and interrupt acknowledge cycles. D/C # is floated off the clock edge that BOFF # is sampled asserted and off the clock edge that the processor asserts HLDA in recognition of HOLD. |
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