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AMD-K6-2E/233AMZ Datasheet(PDF) 131 Page - Advanced Micro Devices |
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AMD-K6-2E/233AMZ Datasheet(HTML) 131 Page - Advanced Micro Devices |
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131 / 332 page ![]() Chapter 5 Signal Descriptions 113 22529B/0—January 2000 AMD-K6™-2E Processor Data Sheet Preliminary Information 5.34 M/IO# (Memory or I/O) Pin Attribute Output Pin Location T-04 Summary The processor drives M/IO# during a bus cycle to indicate whether it is addressing the memory or I/O space. If M/IO# = 1, the processor is addressing memory or a memory-mapped I/O port as the result of an instruction fetch or an instruction that loads or stores data. If M/IO# = 0, the processor is addressing an I/O port during the execution of an I/O instruction. In addition, M/IO# is used to define other bus cycles, including interrupt acknowledge and special cycles. See Table 23 on page 132 for more details. Driven and Floated M/IO# is driven off the same clock edge as ADS# and remains in the same state until the clock edge on which NA# or the last expected BRDY# of the cycle is sampled asserted. M/IO# is driven during memory cycles, I/O cycles, special bus cycles, and interrupt acknowledge cycles. M/IO# is floated off the clock edge on which BOFF# is sampled asserted and off the clock edge on which the processor asserts HLDA in response to HOLD. |
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