ADIS16IMU5SLASHPCBZ datasheet(28/46 Pages) AD

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Data Sheet

ADIS16575/ADIS16576/ADIS16577

USER REGISTER DEFINITIONS

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Rev. 0 | 28 of 46

Each accelerometer has two output data registers. Figure 63 shows

how these two registers combine to support a 32-bit, twos comple-

ment data format for the x-axis accelerometer measurements. This

format also applies to the y- and z-axes.

Figure 63. Accelerometer Output Data Structure

Accelerometer Data Formatting

Table 33 and Table 34 show various numerical examples that

demonstrate the format of the linear acceleration data in both 16-bit

and 32-bit formats using the generic measurement range (AMAX)

and scale factor (KA) definitions from Table 35.

Table 33. 16-Bit Accelerometer Data Format Examples

Acceleration (g)

Decimal

Hexadeci

mal

Binary

+AMAX

+32,000

0x7D00

0111 1101 0000 0000

+2/KA

0x0002

0000 0000 0000 0010

+1/KA

0x0001

0000 0000 0000 0001

0 g

0x0000

0000 0000 0000 0000

−2/KA

−1

0xFFFF

1111 1111 1111 1111

−1/KA

−2

0xFFFE

1111 1111 1111 1110

−AMAX

−32,000

0x8300

1000 0011 0000 0000

Table 34. 32-Bit Accelerometer Data Format Examples

Acceleration (g)

Decimal

Hexadecimal

+AMAX

+2,097,152,000

0x7D000000

+2/(KA × 216 )

0x00000002

+1/(KA × 216 )

0x00000001

0x00000000

−1/(KA × 216 )

−1

0xFFFFFFFF

−2/(KA × 216 )

−2

0xFFFFFFFE

−AMAX

−2,097,152,000

0x83000000

Accelerometer Measurement Range and Scale

Factor

Table 35 provide the measurement range (±AMAX) and scale

factor (KA) for the accelerometer in each ADIS16575/ADIS16576/

ADIS16577 model.

Table 35. Accelerometer Measurement Range and Scale Factors

Model

Range, ±AMAX (g)

Scale Factor, KA (LSB/g)

ADIS16575

±8

4000

ADIS16576

±40

800

ADIS16577

±40

800

X-Axis Accelerometer (X_ACCL_LWR and

X_ACCL_UPR)

Table 36. X_ACCL_LWR Register Definition

Addresses

Default

Access

Flash Backup

0x10, 0x11

Not applicable

Table 37. X_ACCL_LWR Bit Definitions

Bits

Description

[15:0]

X-axis accelerometer data; low word; additional resolution bits

Table 38. X_ACCL_UPR Register Definition

Addresses

Default

Access

Flash Backup

0x12, 0x13

Not applicable

Table 39. X_ACCL_UPR Bit Definitions

Bits

Description

[15:0]

X-axis accelerometer data, high word; twos complement, 0 g =

0x0000, 1 LSB = 1/KA (see Table 35 for KA)

The X_ACCL_LWR (see Table 36 and Table 37) and X_ACCL_

UPR (see Table 38 and Table 39) registers contain the accelerome-

ter data for the x-axis.

Y-Axis Accelerometer (Y_ACCL_LWR and

Y_ACCL_UPR)

Table 40. Y_ACCL_LWR Register Definition

Addresses

Default

Access

Flash Backup

0x14, 0x15

Not applicable

Table 41. Y_ACCL_LWR Bit Definitions

Bits

Description

[15:0]

Y-axis accelerometer data; low word; additional resolution bits

Table 42. Y_ACCL_UPR Register Definition

Addresses

Default

Access

Flash Backup

0x16, 0x17

Not applicable

Table 43. Y_ACCL_UPR Bit Definitions

Bits

Description

[15:0]

Y-axis accelerometer data, high word; twos complement, 0 g =

0x0000, 1 LSB = 1/KA (see Table 35 for KA)

The Y_ACCL_LWR (see Table 40 and Table 41) and Y_ACCL_

UPR (see Table 42 and Table 43) registers contain the accelerome-

ter data for the y-axis.

Z-Axis Accelerometer (Z_ACCL_LWR and

Z_ACCL_UPR)

Table 44. Z_ACCL_LWR Register Definition

Addresses

Default

Access

Flash Backup

0x18, 0x19

Not applicable

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