ADIS16IMU5SLASHPCBZ datasheet(31/46 Pages) AD

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Data Sheet

ADIS16575/ADIS16576/ADIS16577

USER REGISTER DEFINITIONS

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Z-Axis Delta Angle (Z_DELTANG_LWR and

Z_DELTANG_UPR)

Table 63. Z_DELTANG_LWR Register Definitions

Addresses

Default

Access

Flash Backup

0x2C, 0x2D

Not applicable

Table 64. Z_DELTANG_LWR Bit Definitions

Bits

Description

[15:0]

Z-axis delta angle data; low word

Table 65. Z_DELTANG_UPR Register Definitions

Addresses

Default

Access

Flash Backup

0x2E, 0x2F

Not applicable

Table 66. Z_DELTANG_UPR Bit Definitions

Bits

Description

[15:0]

Z-axis delta angle data; high word; twos complement, 0° = 0x0000, 1

LSB = ΔθMAX/215 (see Table 54 for ΔθMAX)

The Z_DELTANG_LWR (see Table 63 and Table 64) and Z_DEL-

TANG_UPR (see Table 65 and Table 66) registers contain the delta

angle data for the z-axis.

Delta Angle Data Formatting

Table 67 and Table 68 show various numerical examples that

demonstrate the format of the delta angle data in both 16-bit and

32-bit formats.

Table 67. 16-Bit Delta Angle Data Format Examples

Delta Angle (°)

Decimal

Hex.

Binary

ΔθMAX × (215−1)/215

+32,767

0x7FFF

0111 1111 1110 1111

+ΔθMAX/214

0x0002

0000 0000 0000 0010

+ΔθMAX/215

0x0001

0000 0000 0000 0001

0x0000

0000 0000 0000 0000

−ΔθMAX/215

−1

0xFFFF

1111 1111 1111 1111

−ΔθMAX/214

−2

0xFFFE

1111 1111 1111 1110

−ΔθMAX

−32,768

0x8000

1000 0000 0000 0000

Table 68. 32-Bit Delta Angle Data Format Examples

Delta Angle (°)

Decimal

Hex.

+ΔθMAX × (231 − 1)/231

+2,147,483,647

0x7FFFFFFF

+ΔθMAX/230

0x00000002

+ΔθMAX/231

0x00000001

0x00000000

−ΔθMAX/231

−1

0xFFFFFFFF

−ΔθMAX/230

−2

0xFFFFFFFE

−ΔθMAX

−2,147,483,648

0x80000000

DELTA VELOCITY

In addition to the linear acceleration measurements along each

axis (x, y, and z), the ADIS16575/ADIS16576/ADIS16577 also pro-

vide delta velocity measurements that calculate the linear velocity

change between each sample update.

Figure 66. Delta Velocity Axis and Polarity Assignments

The delta velocity outputs represent an integration of the accelera-

tion measurements and uses the following formula for all three axes

(x-axis displayed):

∆Vx, nD= 12×fs×∑d=0D−1ax, nD+d+ax, nD+d−1

where:

x is the x-axis.

n is the sample time before the decimation filter.

D is the decimation rate (DEC_RATE + 1, see Table 124).

fS is the sample rate.

d is the incremental variable in the summation formula.

aX is the x-axis acceleration.

When using the internal sample clock, fS equals a nominal rate

of selected 2000 SPS or 4000 SPS. For better precision in this

measurement, measure the internal fS using the data ready signal

on the DR pin (DEC_RATE = 0x0000, see Table 123), divide

each delta angle result (from the delta angle output registers) by

the data ready frequency, and multiply it by the unit sample rate.

Each axis of the delta velocity measurements has two output data

registers. Figure 67 shows how these two registers combine to

support a 32‑bit, twos complement data format for the delta velocity

measurements along the x-axis. This format also applies to the

y-axis and z-axes.

Figure 67. Delta Velocity Output Data Structure

Delta Velocity Measurement Range

Table 69 shows the measurement range for each ADIS16575/

ADIS16576/ADIS16577 model.

Table 69. Delta Velocity Measurement Range

Model

Measurement Range, ±ΔVMAX (m/sec)

ADIS16575

±100

ADIS16576

±125

ADIS16IMU5/PCBZ Datasheet(PDF) 31 Page - Analog Devices

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