ADIS16IMU5SLASHPCBZ datasheet(33/46 Pages) AD

33 / 46 page

Data Sheet

ADIS16575/ADIS16576/ADIS16577

USER REGISTER DEFINITIONS

analog.com

Rev. 0 | 33 of 46

FIFO COUNT (FIFO_CNT)

Table 84. FIFO_CNT Register Definition

Addresses

Default

Access

Flash Backup

0x3C, 0x3D

N/A

Table 85. FIFO_CNT Bit Definitions

Bits

Description

[15:0]

FIFO Sample Count. This 16-bit value represents the number of

inertial data samples queued in the output FIFO. This register is valid

only when the IMU is operating in FIFO mode, as indicated by the

FIFO_CTR register, Bit 0, being set to 1.

Note that issuing a FIFO_FLUSH command clears the current

output FIFO contents and resets this register to zero.

SPI CHECKSUM (SPI_CHKSUM)

Table 86. SPI_CHKSUM Register Definition

Addresses

Default

Access

Flash Backup

0x3E, 0x3F

N/A

Table 87. SPI_CHKSUM Bit Definitions

Bits

Description

[15:0]

SPI Transaction Checksum. This 16-bit value represents the

current checksum calculated for all register data transmitted

during the current sample period.

The SPI dynamic checksum register at Address 0x3E and Address

0x3F is continuously updated with the checksum for all register data

transmitted during the current sample period. The checksum uses

the same byte-wise sum algorithm as the burst read function, ena-

bling simple integration with host systems. SPI_CHKSUM resets to

0x0000 when a fresh sample data is loaded to the output registers

(either from the datapath in direct output mode or from the output

FIFO in FIFO mode) and then updates continuously as the user

reads the fresh sample data.

The SPI_CHKSUM register allows the user to read any arbitrary

sequence of registers per sample and to validate the integrity of

the read. This scheme provides increased flexibility compared to

the burst read function, which offers a checksum but only allows

for reading a specific register sequence. The user can assess SPI

read integrity by calculating the byte-wise sum of all received read

data for a given sample and then comparing the calculated check-

sum with the received SPI_CHKSUM register value for that same

sample. A checksum mismatch indicates one of two conditions:

1. Compromised SPI communications between the IMU and host

(for example, bit slip, incorrect address)

2. A register read sequence split across multiple samples, causing

SPI_CHKSUM to reset midread

Detecting these errors ensures the inertial sample data received by

the host system is both time coherent and valid (transmitted data

matches received data).

To illustrate how this checksum calculation works in practice, here

is a specific example using the byte-wise sum algorithm. This

example demonstrates the process a host system uses to validate

the integrity of received data. This algorithm adds all bytes in the

data sequence as follows:

1. Initialize a 16-bit sum to 0.

2. For each 16-bit register value in the sequence,

a. Add the high byte (Bits[15:8]) to the sum.

b. Add the low byte (Bits[7:0]) to the sum.

3. The final 16-bit sum is the checksum.

For this example, consider the following data for the first few

registers in 32-bit burst mode:

►

X_GYRO_LWR = 0x1234

►

X_GYRO_UPR = 0x5678

►

Y_GYRO_LWR = 0x9ABC

To calculate the checksum, take the following steps:

1. Initialize sum = 0.

2. Add bytes from X_GYRO_LWR: Sum = 0x12 + 0x34 = 0x46.

3. Add bytes from X_GYRO_UPR: Sum = 0x46 + 0x56 + 0x78 =

0x114.

4. Add bytes from Y_GYRO_LWR: Sum = 0x114 + 0x9A + 0xBC =

0x26A.

Note that the final checksum is 0x026A. This checksum can then

be compared with the checksum received in the burst read or the

value read from the SPI_CHKSUM register to verify the integrity of

the data transfer.

Table 88 illustrates the complete burst read SPI communication

sequence, showing the order of register reads for both 16-bit and

32-bit modes, and highlighting the position of the SPI_CHKSUM at

the end of the sequence.

Table 88. Burst Read SPI Communication Sequence with Checksum

16-Bit SPI Word

16-Bit Burst Register

32-Bit Burst Registers

Comments

FIFO_CNT

Not included in checksum.

DIAG_STAT

Not included in checksum.

X_GYRO_UPR or X_DELTANG_UPR

X_GYRO_LWR or X_DELTANG_LWR

OUT_SEL determines which channel is transmitted.

Y_GYRO_UPR or Y_DELTANG_UPR

X_GYRO_UPR or X_DELTANG_UPR

Not applicable.

Z_GYRO_UPR or Z_DELTANG_UPR

Y_GYRO_LWR or Y_DELTANG_LWR

Not applicable.

X_ACCL_UPR or X_DELTVEL_UPR

Y_GYRO_UPR or Y_DELTANG_UPR

Not applicable.

ADIS16IMU5/PCBZ Datasheet(PDF) 33 Page - Analog Devices

ADIS16IMU5/PCBZ Datasheet(HTML) 33 Page - Analog Devices

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46

Datasheet Download

Link URL