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ADIS16IMU5/PCBZ Datasheet(PDF) 42 Page - Analog Devices |
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ADIS16IMU5/PCBZ Datasheet(HTML) 42 Page - Analog Devices |
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42 / 46 page  Data Sheet ADIS16575/ADIS16576/ADIS16577 USER REGISTER DEFINITIONS analog.com Rev. 0 | 42 of 46 SCRATCH REGISTERS (USER_SCR_1 TO USER_SCR_3) Table 139. USER_SCR_1 Register Definition Addresses Default Access Flash Backup 0x76, 0x77 Not applicable R/W Yes Table 140. USER_SCR_1 Bit Definitions Bits Description [15:0] User defined Table 141. USER_SCR_2 Register Definition Addresses Default Access Flash Backup 0x78, 0x79 Not applicable R/W Yes Table 142. USER_SCR_2 Bit Definitions Bits Description [15:0] User defined Table 143. USER_SCR_3 Register Definition Addresses Default Access Flash Backup 0x7A, 0x7B Not applicable R/W Yes Table 144. USER_SCR_3 Bit Definitions Bits Description [15:0] User defined The USER_SCR_1 (see Table 139 and Table 140), USER_SCR_2 (see Table 141 and Table 142), and USER_SCR_3 (see Table 143 and Table 144) registers provide three locations for the user to store information. To ensure that the stored information is retained after a power cycle, execute a flash memory update command (Register GLOB_CMD, Bit 3; see Table 128) after writing to these registers. FLASH MEMORY ENDURANCE COUNTER (FLSHCNT_LWR AND FLSHCNT_UPR) Table 145. FLSHCNT_LWR Register Definition Addresses Default Access Flash Backup 0x7C, 0x7D Not applicable R No Table 146. FLSHCNT_LWR Bit Definitions Bits Description [15:0] Flash memory write counter, low word Table 147. FLSHCNT_UPR Register Definition Addresses Default Access Flash Backup 0x7E, 0x7F Not applicable R No Table 148. FLSHCNT_UPR Bit Definitions Bits Description [15:0] Flash memory write counter, high word The FLSHCNT_LWR (see Table 145 and Table 146) and FLSHCNT_UPR (see Table 147 and Table 148) registers combine to provide a 32-bit binary counter that tracks the number of flash memory write cycles. In addition to the number of write cycles, the flash memory has a finite service lifetime, which depends on TJ. Figure 73 guides estimating the retention life for the flash memory at specific TJ values. TJ is approximately 7°C more than TC. Figure 73. Flash Memory Retention |
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