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ADIS16IMU5/PCBZ Datasheet(PDF) 34 Page - Analog Devices

Part # ADIS16IMU5/PCBZ
Description  Precision MEMS IMU Module
PDF  46 Pages
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Manufacturer  AD [Analog Devices]
Direct Link  http://www.analog.com
Logo AD - Analog Devices

ADIS16IMU5/PCBZ Datasheet(HTML) 34 Page - Analog Devices

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Data Sheet
ADIS16575/ADIS16576/ADIS16577
USER REGISTER DEFINITIONS
analog.com
Rev. 0 | 34 of 46
Table 88. Burst Read SPI Communication Sequence with Checksum (Continued)
16-Bit SPI Word
16-Bit Burst Register
32-Bit Burst Registers
Comments
6
Y_ACCL_UPR or Y_DELTVEL_UPR
Z_GYRO_LWR or Z_DELTANG_LWR
Not applicable.
7
Z_ACCL_UPR or Z_DELTVEL_UPR
Z_GYRO_UPR or Z_DELTANG_UPR
Not applicable.
8
TEMP
X_ACCL_LWR or X_DELTVEL_LWR
Not applicable.
9
DATA_CNTR or TIMESTAMP_LWR
X_ACCL_UPR or X_DELTVEL_UPR
Not applicable.
10
SPI_CHKSUM
Y_ACCL_LWR or Y_DELTVEL_LWR
Not applicable.
11
Not applicable
Y_ACCL_UPR or Y_DELTVEL_UPR
Not applicable.
12
Not applicable
Z_ACCL_LWR or Z_DELTVEL_LWR
Not applicable.
13
Not applicable
Z_ACCL_UPR or Z_DELTVEL_UPR
Not applicable.
14
Not applicable
TEMP
Not applicable.
15
Not applicable
DATA_CNTR or TIMESTAMP_LWR
DATA_CNTR or TIMESTAMP_LWR. When scaled
sync mode is disabled, DATA_CNTR is transmit-
ted. When scaled sync mode is enabled, TIME-
STAMP_LWR replaces DATA_CNTR.
16
Not applicable
0s or TIMESTAMP_UPR
TIMESTAMP_UPR bit width selected by TS_32 in the
MSC_CTRL register
17
Not applicable
SPI_CHKSUM
Not applicable
As indicated in Table 88, the the SPI_CHKSUM value follows the
0s and the TIME_STAMP_UPR value in the burst read sequence.
Once all sensor data and timestamp information is read, an addi-
tional 16-bit transaction is required to read the checksum. It is
important to note that the checksum calculation does not include
FIFO_CNT and DIAG_STAT registers, as mentioned in the not
included in checksum comments in Table 88.
This implementation of SPI_CHKSUM provides a robust method
for ensuring data integrity in SPI communications with the IMU,
allowing for flexible read sequences while maintaining the ability to
detect transmission errors.
CALIBRATION, BIAS ADJUSTMENT, AND
CONTINUOUS BIAS ESTIMATION (CBE)
The ADIS16575/ADIS16576/ADIS16577 employ a comprehensive
approach to calibration and bias management for its inertial sen-
sors (accelerometers and gyroscopes). Each sensor's signal chain
includes unique correction formulas derived from extensive charac-
terization of bias, sensitivity, alignment, and point of percussion (for
accelerometers) over the −40°C to +85°C temperature range.
While the factory-derived correction formulas are not user accessi-
ble, the devices provide the following registers for individual sensor
bias adjustment:
1. Gyroscope bias registers: XG_BIAS_LWR, XG_BIAS_UPR,
YG_BIAS_LWR, YG_BIAS_UPR, ZG_BIAS_LWR, and
ZG_BIAS_UPR
2. Accelerometer bias registers: XA_BIAS_LWR, XA_BIAS_UPR,
YA_BIAS_LWR, YA_BIAS_UPR, ZA_BIAS_LWR, and
ZA_BIAS_UPR
Each axis uses two 16-bit registers (xx_BIAS_LWR and
(xx_BIAS_UPR) to form a 32-bit bias adjustment value, matching
the format and scaling of the sensor output registers. These user-
adjustable corrections are applied after the factory-derived formulas
in the signal chain, which processes at a user-defined rate of 2000
Hz or 4000 Hz with the internal sample clock.
To enhance long-term stability, the ADIS16575/ADIS16576/
ADIS16577 feature CBE. The NULL_CNFG register controls CBE,
with Bits[13:8] enabling and disabling CBE for each axis and
Bits[3:0] setting the estimation time base. The bias correction
update command (GLOB_CMD, Bit 0) applies the latest CBE esti-
mates to the bias adjustment registers.
Users can adjust bias through the following two methods:
1. Manual adjustment. Direct writing to bias registers for immedi-
ate correction.
2. Automatic adjustment. Configuring NULL_CNFG for CBE and
periodically applying updates.
This integrated approach to calibration and bias management, com-
bining factory calibration, user-accessible adjustments, and continu-
ous estimation, provides powerful tools to optimize the ADIS16575/
ADIS16576/ADIS16577 performance across varying conditions and
applications.
Calibration, Gyroscope Bias (XG_BIAS_LWR
and XG_BIAS_UPR)
Table 89. XG_BIAS_LWR Register Definition
Addresses
Default
Access
Flash Backup
0x40, 0x41
0x0000
R/W
Yes
Table 90. XG_BIAS_LWR Bit Definitions
Bits
Description
[15:0]
X-axis gyroscope offset correction; lower word



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