XM33C321ASPZR datasheet(74/122 Pages) TI2

74 / 122 page

Table 8-6. DMA Trigger Mapping (continued)

Trigger 0:41

DMA0

DMA1

ADC1 SEQ1

ADC1 SEQ2

ADC1 SEQ3

SHA Publisher 1

I2S0 Publisher 1

I2S0 Publisher 2

I2S1 Publisher 1

I2S1 Publisher 2

QSPI RX

QSPI TX

UC1_0.TX

Reserved

UC1_0.RX

Reserved

UC1_1.TX

Reserved

UC1_1.RX

Reserved

UC2.TX

UC2.RX

UC15_0.TX

UC15_0.RX

UC15_1.TX

UC15_1.RX

UC12.TX

UC12.RX

UC13_0.TX

UC13_0.RX

UC13_1.TX

UC13_1.RX

UC13_2.TX

UC13_2.RX

UC13_3.TX

UC13_3.RX

UC14.TX

UC14.RX

For more details, see the DMA chapter of the MSPM33C3x 160-MHz Microcontrollers Technical Reference

Manual.

8.8 Event Manager

The event manager transfers digital events from one entity (for example, a peripheral) to another (for example, a

second peripheral, the DMA, or the CPU). The event manager implements event transfer through a defined set

of event publishers (generators) and subscribers (receivers) which are interconnected through an event fabric

containing a combination of static and programmable routes.

Events that are transferred by the event manager include:

• Peripheral event transferred to the CPU as an interrupt request (IRQ) (Static Event)

– Example: RTC interrupt is sent to the CPU

• Peripheral event transferred to the DMA as a DMA trigger (DMA Event)

– Example: UART data receive trigger to DMA to request a DMA transfer

MSPM33C321A, MSPM33C3219

SLASFB6A – DECEMBER 2025 – REVISED SEPTEMBER 2026

www.ti.com

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