TMS320F241FN datasheet(47/66 Pages) TI

47 / 66 page

TMS320C242

DSP CONTROLLER

SPRS063B – DECEMBER 1997 – REVISED DECEMBER 1999

POST OFFICE BOX 1443

• HOUSTON, TEXAS 77251–1443

CLOCK CHARACTERISTICS AND TIMINGS

clock options

PARAMETER

PLL multiply-by-4

The ’C242 device includes an on-chip PLL which is hardwired for multiply-by-4 operation. This requires the use

of a 5-MHz clock input frequency for 20-MHz device operation. This input clock can be provided from either

an external reference crystal or oscillator.

external reference crystal clock option

The internal oscillator is enabled by connecting a crystal across XTAL1/CLKIN and XTAL2 pins as shown in

Figure 17a. The crystal should be in fundamental operation and parallel resonant, with an effective series

resistance of 30

Ω (typical)† and a power dissipation of 1 mW; it should be specified at a load capacitance of

20 pF.

external reference oscillator clock option

The internal oscillator is disabled by connecting a TTL-level clock signal to XTAL1/CLKIN and leaving the XTAL2

input pin unconnected as shown in Figure 17b.

External

Clock Signal

(toggling 0 – 5 V)

(see Note A)

Crystal

XTAL2

XTAL1/CLKIN

XTAL2

(a)

(b)

NOTES: A. For the values of C1 and C2, see the crystal manufacturer’s specification.

B. TI recommends that customers have the resonator/crystal vendor characterize the operation of their device with the DSP chip. The

resonator/crystal vendor has the equipment and expertise to tune the tank circuit. The vendor can also advise customers regarding

the proper component values which ensure startup and stability over the entire operating range.

Figure 17. Recommended Crystal / Clock Connection

† If the input frequency is 5 MHz, the series resistances of the crystal can be between 30 to 150

Ω.

TMS320F241FN Datasheet(PDF) 47 Page - Texas Instruments