TMS320F241FN datasheet(52/66 Pages) TI

52 / 66 page

TMS320C242

DSP CONTROLLER

SPRS063B – DECEMBER 1997 – REVISED DECEMBER 1999

POST OFFICE BOX 1443

• HOUSTON, TEXAS 77251–1443

TIMING EVENT MANAGER INTERFACE

PWM timings

PWM refers to PWM outputs on PWM1, PWM2, PWM3, PWM4, PWM5, PWM6, T1PWM, and T2PWM.

switching characteristics over recommended operating conditions for PWM timing

[H = 0.5tc(CO)] (see Figure 25)

PARAMETER

MIN

MAX

UNIT

tw(PWM)†

Pulse duration, PWM output high/low

2H+5

td(PWM)CO

Delay time, CLKOUT low to PWM output switching

† PWM outputs may be 100%, 0%, or increments of tc(CO) with respect to the PWM period.

timing requirements‡ [H = 0.5tc(CO)] (see Figure 26)

MIN

MAX

UNIT

tw(TMRDIR)

Pulse duration, TMRDIR low/high

4H+5

tw(TMRCLK)

Pulse duration, TMRCLK low as a percentage of TMRCLK cycle time

twh(TMRCLK)

Pulse duration, TMRCLK high as a percentage of TMRCLK cycle time

tc(TMRCLK)

Cycle time, TMRCLK

tc(CO)

‡ Parameter TMRDIR is equal to the pin TDIR, and parameter TMRCLK is equal to the pin TCLKIN.

tw(PWM)

td(PWM)CO

PWMx

CLKOUT

Figure 25. PWM Output Timing

CLKOUT

tw(TMRDIR)

TMRDIR

Figure 26. Capture/TMRDIR Timing

TMS320F241FN Datasheet(PDF) 52 Page - Texas Instruments

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