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TMS320F241FN Datasheet(PDF) 30 Page - Texas Instruments |
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TMS320F241FN Datasheet(HTML) 30 Page - Texas Instruments |
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30 / 66 page ![]() TMS320C242 DSP CONTROLLER SPRS063B – DECEMBER 1997 – REVISED DECEMBER 1999 30 POST OFFICE BOX 1443 • HOUSTON, TEXAS 77251–1443 dual-access RAM (DARAM) There are 544 words × 16 bits of DARAM on the ’C242 device. The ’C242 DARAM allows writes to and reads from the RAM in the same cycle. The DARAM is configured in three blocks: block 0 (B0), block 1 (B1), and block 2 (B2). Block 1 contains 256 words and Block 2 contains 32 words, and both blocks are located only in data memory space. Block 0 contains 256 words, and can be configured to reside in either data or program memory space. The SETC CNF (configure B0 as data memory) and CLRC CNF (configure B0 as program memory) instructions allow dynamic configuration of the memory maps through software. When using on-chip RAM, or high-speed external memory, the ’C242 runs at full speed with no wait states. The ability of the DARAM to allow two accesses to be performed in one cycle, coupled with the parallel nature of the ’C242 architecture, enables the device to perform three concurrent memory accesses in any given machine cycle. Externally, the READY line can be used to interface the ’C242 to slower, less expensive external memory. Downloading programs from slow off-chip memory to on-chip RAM can speed processing while cutting system costs. ROM The ’C242 device contains 4K words of mask-programmable ROM located in program memory space. Customers can arrange to have this ROM programmed with contents unique to any particular application. peripherals The integrated peripherals of the TMS320x24x are described in the following subsections: D Event-manager (EV2) module D Analog-to-digital converter (ADC) module D Serial communications interface (SCI) module D Watchdog (WD) timer module event-manager (EV2) module The event-manager module includes general-purpose (GP) timers, full compare/PWM units, capture units, and quadrature-encoder pulse (QEP) circuits. Figure 9 shows the functions of the event manager. |
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